-
公开(公告)号：US20160164461A1
公开(公告)日：2016-06-09
申请号：US15043950
申请日：2016-02-15
Applicant: Renesas Electronics Corporation
Inventor： Osamu Ozawa , Masashi Horiguchi , Yuichi Okuda , Akihito Anzai
CPC classification number: H03B5/32 , H02H7/20 , H03B5/364 , H03B2200/0088 , H03B2202/03 , H03B2202/082 , H03B2202/084 , H05K1/181 , H05K2201/10075
Abstract: A wiring pattern for oscillation input signal and a wiring pattern for oscillation output signal are provided on a printed circuit board, and a wiring pattern for ground power source voltage is arranged in a region therebetween. A quartz crystal unit is connected between the wiring pattern for oscillation input signal and the wiring pattern for oscillation output signal and one ends of capacitors serving as load capacitors thereof are connected to the wiring pattern for ground power source voltage. Further, a wiring pattern for VSS is arranged so as to enclose these wiring patterns, and a wiring pattern for VSS is arranged also in a lower layer in addition thereto. By this means, reduction of a parasitic capacitance between an XIN node and an XOUT node, improvement in noise tolerance of these nodes and others can be achieved.
Abstract translation: 用于振荡输入信号的布线图案和用于振荡输出信号的布线图案设置在印刷电路板上，并且用于接地电源电压的布线图案布置在它们之间的区域中。 在用于振荡输入信号的布线图案和振荡输出信号的布线图案之间连接石英晶体单元，并且将其作为负载电容器的电容器的一端连接到地电源电压的布线图案。 此外，为了包围这些布线图案，布置有用于VSS的布线图案，并且除此之外，还布置有用于VSS的布线图案。 通过这种方式，可以实现XIN节点和XOUT节点之间的寄生电容的减小，这些节点等的噪声容限的改善。
-
公开(公告)号：US09300248B2
公开(公告)日：2016-03-29
申请号：US14263030
申请日：2014-04-28
Applicant: Renesas Electronics Corporation
Inventor： Osamu Ozawa , Masashi Horiguchi , Yuichi Okuda , Akihito Anzai
CPC classification number: H03B5/32 , H02H7/20 , H03B5/364 , H03B2200/0088 , H03B2202/03 , H03B2202/082 , H03B2202/084 , H05K1/181 , H05K2201/10075
Abstract: A wiring pattern for oscillation input signal and a wiring pattern for oscillation output signal are provided on a printed circuit board, and a wiring pattern for ground power source voltage is arranged in a region therebetween. A quartz crystal unit is connected between the wiring pattern for oscillation input signal and the wiring pattern for oscillation output signal and one ends of capacitors serving as load capacitors thereof are connected to the wiring pattern for ground power source voltage. Further, a wiring pattern for VSS is arranged so as to enclose these wiring patterns, and a wiring pattern for VSS is arranged also in a lower layer in addition thereto. By this means, reduction of a parasitic capacitance between an XIN node and an XOUT node, improvement in noise tolerance of these nodes and others can be achieved.
Abstract translation: 用于振荡输入信号的布线图案和用于振荡输出信号的布线图案设置在印刷电路板上，并且用于接地电源电压的布线图案布置在它们之间的区域中。 在用于振荡输入信号的布线图案和振荡输出信号的布线图案之间连接石英晶体单元，并且将其作为负载电容器的电容器的一端连接到地电源电压的布线图案。 此外，为了包围这些布线图案，布置有用于VSS的布线图案，并且除此之外，还布置有用于VSS的布线图案。 通过这种方式，可以实现XIN节点和XOUT节点之间的寄生电容的减小，这些节点等的噪声容限的改善。
-
3.发明授权公开(公告)号：US09281781B2
公开(公告)日：2016-03-08
申请号：US14248658
申请日：2014-04-09
Applicant: RENESAS ELECTRONICS CORPORATION
Inventor： Osamu Ozawa , Soshiro Nishioka
IPC: H03B5/36
CPC classification number: H03B5/364 , H03B5/366 , H03B2200/0082 , H03B2200/0094 , H03B2201/0266
Abstract: A semiconductor apparatus includes: first and second external terminals that are connected to respective both ends of an piezoelectric vibrator, in which the piezoelectric vibrator is externally disposed; an inverting amplifier that is disposed between the first and second external terminals; a feedback resistance that feeds back an output of the inverting amplifier to an input of the inverting amplifier; a first capacitative element that is disposed between the first external terminal and a reference voltage terminal; a first resistive element that is disposed in series with the first capacitative element; a second capacitative element that is disposed between the second external terminal and the reference voltage terminal; and a second resistive element that is disposed in series with the second capacitative element.
Abstract translation: 半导体装置包括：第一和第二外部端子，其连接到压电振动器的相应的两端，其中压电振动器在外部布置; 反相放大器，设置在第一和第二外部端子之间; 将反相放大器的输出反馈到反相放大器的输入的反馈电阻; 第一电容元件，设置在第一外部端子和参考电压端子之间; 与第一电容元件串联布置的第一电阻元件; 第二电容元件，设置在第二外部端子和参考电压端子之间; 以及与第二电容元件串联布置的第二电阻元件。
-
Patent Agency Ranking
公开(公告)号：US09093952B2
公开(公告)日：2015-07-28
申请号：US13952579
申请日：2013-07-26
Applicant: Renesas Electronics Corporation
Inventor： Osamu Ozawa , Masashi Horiguchi , Takayasu Ito
IPC: H03B5/36
CPC classification number: H03B5/36 , H03B5/364 , H03B5/366 , H03B2200/0046 , H03B2200/005 , H03B2200/0082 , H03B2200/0088 , H03B2200/0094
Abstract: The present invention provides a semiconductor device including a first terminal and a second terminal respectively coupled to both ends of a crystal resonator, an inverter circuit having an input coupled to the first terminal and an output coupled to the second terminal, a feedback resistor which couples between the first terminal and the second terminal, a variable capacitor coupled to at least one of the first and second terminals, and a control circuit. The control circuit performs control to increase both of the drive capability of the inverter circuit and the capacitance value of the variable capacitor in a second mode rather than a first mode.
Abstract translation: 本发明提供了一种半导体器件，包括分别耦合到晶体谐振器的两端的第一端子和第二端子，具有耦合到第一端子的输入端和耦合到第二端子的输出端的反相器电路，耦合到 在第一端子和第二端子之间，耦合到第一和第二端子中的至少一个的可变电容器和控制电路。 控制电路执行控制以在第二模式而不是第一模式中增加逆变器电路的驱动能力和可变电容器的电容值。
-
公开(公告)号：US20140232476A1
公开(公告)日：2014-08-21
申请号：US14263030
申请日：2014-04-28
Applicant: Renesas Electronics Corporation
Inventor： Osamu Ozawa , Masashi Horiguchi , Yuichi Okuda , Akihito Anzai
CPC classification number: H03B5/32 , H02H7/20 , H03B5/364 , H03B2200/0088 , H03B2202/03 , H03B2202/082 , H03B2202/084 , H05K1/181 , H05K2201/10075
Abstract: A wiring pattern for oscillation input signal and a wiring pattern for oscillation output signal are provided on a printed circuit board, and a wiring pattern for ground power source voltage is arranged in a region therebetween. A quartz crystal unit is connected between the wiring pattern for oscillation input signal and the wiring pattern for oscillation output signal and one ends of capacitors serving as load capacitors thereof are connected to the wiring pattern for ground power source voltage. Further, a wiring pattern for VSS is arranged so as to enclose these wiring patterns, and a wiring pattern for VSS is arranged also in a lower layer in addition thereto. By this means, reduction of a parasitic capacitance between an XIN node and an XOUT node, improvement in noise tolerance of these nodes and others can be achieved.
Abstract translation: 用于振荡输入信号的布线图案和用于振荡输出信号的布线图案设置在印刷电路板上，并且用于接地电源电压的布线图案布置在它们之间的区域中。 在用于振荡输入信号的布线图案和振荡输出信号的布线图案之间连接石英晶体单元，并且其作为负载电容器的电容器的一端连接到地电源电压的布线图案。 此外，为了包围这些布线图案，布置有用于VSS的布线图案，并且除此之外，还布置有用于VSS的布线图案。 通过这种方式，可以实现XIN节点和XOUT节点之间的寄生电容的减小，这些节点等的噪声容限的改善。
-
公开(公告)号：US09628021B2
公开(公告)日：2017-04-18
申请号：US15043950
申请日：2016-02-15
Applicant: Renesas Electronics Corporation
Inventor： Osamu Ozawa , Masashi Horiguchi , Yuichi Okuda , Akihito Anzai
CPC classification number: H03B5/32 , H02H7/20 , H03B5/364 , H03B2200/0088 , H03B2202/03 , H03B2202/082 , H03B2202/084 , H05K1/181 , H05K2201/10075
Abstract: A wiring pattern for oscillation input signal and a wiring pattern for oscillation output signal are provided on a printed circuit board, and a wiring pattern for ground power source voltage is arranged in a region therebetween. A quartz crystal unit is connected between the wiring pattern for oscillation input signal and the wiring pattern for oscillation output signal and one ends of capacitors serving as load capacitors thereof are connected to the wiring pattern for ground power source voltage. Further, a wiring pattern for VSS is arranged so as to enclose these wiring patterns, and a wiring pattern for VSS is arranged also in a lower layer in addition thereto. By this means, reduction of a parasitic capacitance between an XIN node and an XOUT node, improvement in noise tolerance of these nodes and others can be achieved.
-
公开(公告)号：US20150326209A1
公开(公告)日：2015-11-12
申请号：US14803065
申请日：2015-07-18
Applicant: Renesas Electronics Corporation
Inventor： Osamu Ozawa , Masashi Horiguchi , Takayasu Ito
IPC: H03K3/02
CPC classification number: H03B5/36 , H03B5/364 , H03B5/366 , H03B2200/0046 , H03B2200/005 , H03B2200/0082 , H03B2200/0088 , H03B2200/0094
Abstract: The present invention provides a semiconductor device including a first terminal and a second terminal respectively coupled to both ends of a crystal resonator, an inverter circuit having an input coupled to the first terminal and an output coupled to the second terminal, a feedback resistor which couples between the first terminal and the second terminal, a variable capacitor coupled to at least one of the first and second terminals, and a control circuit. The control circuit performs control to increase both of the drive capability of the inverter circuit and the capacitance value of the variable capacitor in a second mode rather than a first mode.
Abstract translation: 本发明提供了一种半导体器件，包括分别耦合到晶体谐振器的两端的第一端子和第二端子，具有耦合到第一端子的输入端和耦合到第二端子的输出端的反相器电路，耦合到 在第一端子和第二端子之间，耦合到第一和第二端子中的至少一个的可变电容器和控制电路。 控制电路执行控制以在第二模式而不是第一模式中增加逆变器电路的驱动能力和可变电容器的电容值。
-
公开(公告)号：US20140035689A1
公开(公告)日：2014-02-06
申请号：US13952579
申请日：2013-07-26
Applicant: Renesas Electronics Corporation
Inventor： Osamu Ozawa , Masashi Horiguchi , Takayasu Ito
IPC: H03B28/00
CPC classification number: H03B5/36 , H03B5/364 , H03B5/366 , H03B2200/0046 , H03B2200/005 , H03B2200/0082 , H03B2200/0088 , H03B2200/0094
Abstract: The present invention provides a semiconductor device including a first terminal and a second terminal respectively coupled to both ends of a crystal resonator, an inverter circuit having an input coupled to the first terminal and an output coupled to the second terminal, a feedback resistor which couples between the first terminal and the second terminal, a variable capacitor coupled to at least one of the first and second terminals, and a control circuit. The control circuit performs control to increase both of the drive capability of the inverter circuit and the capacitance value of the variable capacitor in a second mode rather than a first mode.
Abstract translation: 本发明提供了一种半导体器件，包括分别耦合到晶体谐振器的两端的第一端子和第二端子，具有耦合到第一端子的输入端和耦合到第二端子的输出端的反相器电路，耦合到 在第一端子和第二端子之间，耦合到第一和第二端子中的至少一个的可变电容器和控制电路。 控制电路执行控制以在第二模式而不是第一模式中增加逆变器电路的驱动能力和可变电容器的电容值。
-
-
-
-
-
-
-
Search Results
8
records
(took 0.028 seconds)
