公开(公告)号：US20200051913A1

公开(公告)日：2020-02-13

申请号：US16523685

申请日：2019-07-26

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Tomohiko AIKA ,  Takayuki IGARASHI ,  Takehiro OCHI

IPC: H01L23/525 ,  H01L27/06 ,  H01L21/8234

Abstract: Reliability of a semiconductor device is improved. The semiconductor device includes a silicon pattern for a fuse element, a metal silicide layer formed on an upper surface and a side surface of the silicon pattern, a gate electrode for MISFET, and a metal silicide layer formed on an upper surface of the gate electrode. The height from the lower surface of the silicon pattern to the lower end of the metal silicide layer is lower than the height from the lower surface of the gate electrode to the lower end of the metal silicide layer.

公开(公告)号：US20180082887A1

公开(公告)日：2018-03-22

申请号：US15640564

申请日：2017-07-02

Applicant: Renesas Electronics Corporation

Inventor： Tomohiko AIKA

IPC: H01L21/762 ,  H01L21/308 ,  H01L21/027 ,  H01L21/311 ,  H01L21/306 ,  H01L29/66 ,  H01L29/06 ,  H01L29/78 ,  G03F7/16 ,  G03F7/24 ,  G03F7/09 ,  G03F7/11

CPC classification number: H01L21/76224 ,  G03F7/094 ,  G03F7/11 ,  G03F7/162 ,  G03F7/2028 ,  G03F7/24 ,  H01L21/0273 ,  H01L21/304 ,  H01L21/30604 ,  H01L21/3081 ,  H01L21/3085 ,  H01L21/3086 ,  H01L21/31111 ,  H01L29/0649 ,  H01L29/66681 ,  H01L29/7816

Abstract: A photoresist pattern is not formed in an outer circumferential region from an outer circumferential end of a semiconductor substrate up to 0.5 mm to 3.0 mm, in a process for patterning a silicon oxide film which will serve as a hard mask. A part of the silicon oxide film which is positioned in the outer circumferential region is removed, thereby exposing the semiconductor substrate, in a process for performing an etching process for patterning the silicon oxide film. In the process for performing the etching process for the semiconductor substrate with using the silicon oxide film as an etching mask, the surface of the semiconductor substrate of the outer circumferential region is lowered. Then, a step difference is formed in a position nearer to a chip formation region, in the semiconductor substrate.