公开(公告)号：US12293925B2

公开(公告)日：2025-05-06

申请号：US17894579

申请日：2022-08-24

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Yuki Murayama ,  Makoto Koshimizu ,  Takahiro Mori ,  Junjiro Sakai ,  Satoshi Iida

IPC: H01L21/4757 ,  H01L21/311 ,  H01L21/475 ,  H01L21/4763 ,  H01L21/768 ,  H01L23/00 ,  H01L23/31 ,  H01L23/522 ,  H01L23/532

Abstract: There is formed a semiconductor device including, as the uppermost-layer wiring of the multilayer wiring layer, a plurality of first wirings, a second wiring, a plurality of first dummy wirings, a second dummy wiring, and a passivation film covering these wirings. The passivation film is patterned by etching with a photoresist film used as a mask, the plurality of first wirings and the plurality of first dummy wirings close thereto are densely formed, and the second dummy wiring is formed so as to surround a periphery of the second wiring sparsely formed directly above an analog circuit portion.