公开(公告)号：US20130207158A1

公开(公告)日：2013-08-15

申请号：US13764479

申请日：2013-02-11

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Daisuke ARAI ,  Sakae KUBO ,  Yuta IKEGAMI

IPC: H01L29/739

CPC classification number: H01L29/7393 ,  H01L29/045 ,  H01L29/0619 ,  H01L29/0623 ,  H01L29/0696 ,  H01L29/0847 ,  H01L29/66333 ,  H01L29/7395

Abstract: To improve a manufacture yield of semiconductor devices each including an IGBT, an active region defined by an insulating film and where an element of an IGBT is formed has a first long side and a second long side spaced at a predetermined distance apart from each other and extended in a first direction in a planar view. One end of the first long side has a first short side forming a first angle with the first long side, and one end of the second long side has a second short side forming a second angle with the second long side. The other end of the first long side has a third short side forming a third angle with the first long side, and the other end of the second long side has a fourth short side forming a fourth angle with the second long side. The first angle, the second angle, the third angle, and the fourth angle are in a range larger than 90 degrees and smaller than 180 degrees.

Abstract translation: 为了提高包括IGBT的半导体器件的制造成品率，由绝缘膜限定的有源区域和形成有IGBT的元件的第一长边和第二长边彼此隔开预定距离， 在平面视图中沿第一方向延伸。 第一长边的一端具有与第一长边形成第一角度的第一短边，第二长边的一端具有与第二长边形成第二角度的第二短边。 第一长边的另一端具有与第一长边形成第三角度的第三短边，而第二长边的另一端具有与第二长边形成第四角度的第四短边。 第一角度，第二角度，第三角度和第四角度在大于90度且小于180度的范围内。

公开(公告)号：US20160308022A1

公开(公告)日：2016-10-20

申请号：US15198395

申请日：2016-06-30

Applicant: Renesas Electronics Corporation

Inventor： Yuta IKEGAMI ,  Tsuyoshi KACHI

IPC: H01L29/66 ,  H01L21/768 ,  H01L21/308 ,  H01L21/321 ,  H01L21/8222 ,  H01L21/306

CPC classification number: H01L29/66348 ,  H01L21/30604 ,  H01L21/3085 ,  H01L21/32105 ,  H01L21/76895 ,  H01L21/8222 ,  H01L29/0619 ,  H01L29/0653 ,  H01L29/1095 ,  H01L29/4236 ,  H01L29/42376 ,  H01L29/6634 ,  H01L29/7397

Abstract: An improvement is achieved in the performance of a semiconductor device. Over the main surface of a semiconductor substrate for the n-type base of an IGBT, an insulating layer is formed. In a trench of the insulating layer, an n-type semiconductor layer is formed over the semiconductor substrate and, on both sides of the semiconductor layer, gate electrodes are formed via gate insulating films. In an upper portion of the semiconductor layer, a p-type semiconductor region for a p-type base and an n+-type semiconductor region for an n-type emitter are formed. Under the gate electrodes, parts of the insulating layer are present. The side surfaces of the gate electrodes opposite to the side surfaces thereof facing the semiconductor layer via the gate insulating films are adjacent to the insulating layer.

Abstract translation: 在半导体器件的性能方面实现了改进。 在IGBT的n型基极用半导体基板的主表面上形成绝缘层。 在绝缘层的沟槽中，在半导体衬底上形成n型半导体层，并且在半导体层的两侧，通过栅极绝缘膜形成栅电极。 在半导体层的上部形成p型基极的p型半导体区域和n型发射极的n +型半导体区域。 在栅电极下方存在绝缘层的部分。 与通过栅极绝缘膜面对半导体层的侧表面相对的栅电极的侧表面与绝缘层相邻。

公开(公告)号：US20160043206A1

公开(公告)日：2016-02-11

申请号：US14806115

申请日：2015-07-22

Applicant: Renesas Electronics Corporation

Inventor： Yuta IKEGAMI ,  Tsuyoshi KACHI

IPC: H01L29/739 ,  H01L29/66 ,  H01L29/423

CPC classification number: H01L29/66348 ,  H01L21/30604 ,  H01L21/3085 ,  H01L21/32105 ,  H01L21/76895 ,  H01L21/8222 ,  H01L29/0619 ,  H01L29/0653 ,  H01L29/1095 ,  H01L29/4236 ,  H01L29/42376 ,  H01L29/6634 ,  H01L29/7397

Abstract: An improvement is achieved in the performance of a semiconductor device. Over the main surface of a semiconductor substrate for the n-type base of an IGBT, an insulating layer is formed. In a trench of the insulating layer, an n-type semiconductor layer is formed over the semiconductor substrate and, on both sides of the semiconductor layer, gate electrodes are formed via gate insulating films. In an upper portion of the semiconductor layer, a p-type semiconductor region for a p-type base and an n+-type semiconductor region for an n-type emitter are formed. Under the gate electrodes, parts of the insulating layer are present. The side surfaces of the gate electrodes opposite to the side surfaces thereof facing the semiconductor layer via the gate insulating films are adjacent to the insulating layer.

Abstract translation: 在半导体器件的性能方面实现了改进。 在IGBT的n型基极用半导体基板的主表面上形成绝缘层。 在绝缘层的沟槽中，在半导体衬底上形成n型半导体层，并且在半导体层的两侧，通过栅极绝缘膜形成栅电极。 在半导体层的上部形成p型基极的p型半导体区域和n型发射极的n +型半导体区域。 在栅电极下方存在绝缘层的部分。 通过栅极绝缘膜与栅极电极的与半导体层相对的侧面相对的侧面与绝缘层相邻。