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公开(公告)号：US20220360179A1
公开(公告)日：2022-11-10
申请号：US17869536
申请日：2022-07-20
Applicant: ROHM CO., LTD.
Inventor： Yuji ISHIMATSU , Ryuichi FURUTANI
Abstract: The power converter A1 includes a semiconductor device B1, and a substrate H on which the semiconductor device B1 is mounted, where the semiconductor device B1 includes a control chip constituting a primary control circuit, a semiconductor chip constituting a secondary power circuit, and a transmission circuit for electrically insulating the primary control circuit and the secondary power circuit and for signal transmission between the primary control circuit and the secondary power circuit. The substrate H has a conductive portion K. The power converter A1 includes a connecting terminal T1 disposed on the substrate H and electrically connected to the conductive portion K. The power converter A1 includes a conductive path D1 that is at least partially formed by the conductive portion K of the substrate H, and that electrically connects the primary control circuit and the connecting terminal T1. Such a configuration contributes to downsizing the power converter A1.
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公开(公告)号：US20250054927A1
公开(公告)日：2025-02-13
申请号：US18926086
申请日：2024-10-24
Applicant: ROHM CO., LTD.
Inventor： Yuji ISHIMATSU , Ryuichi FURUTANI
IPC: H01L25/16 , H01L23/00 , H01L23/31 , H01L23/495 , H01L23/522
Abstract: A semiconductor device A1 includes a substrate 3, a conductive section 5 formed on the substrate 3 and including a conductive material, a lead 1A located on the substrate 3, a semiconductor chip 4A located on the lead 1A, a control chip 4G located on the substrate 3 and electrically connected to the conductive section 5 and the semiconductor chip 4A for controlling an operation of the semiconductor chip 4A, and a resin 7 covering the semiconductor chip 4A, the control chip 4G, at least a part of the substrate 3 and a part of the lead 1A. This configuration contributes to achieving a higher level of integration of the semiconductor device.
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公开(公告)号：US20210359607A1
公开(公告)日：2021-11-18
申请号：US17284229
申请日：2019-10-28
Applicant: ROHM CO., LTD.
Inventor： Yuji ISHIMATSU , Ryuichi FURUTANI
Abstract: The power converter A1 includes a semiconductor device B1, and a substrate H on which the semiconductor device B1 is mounted, where the semiconductor device B1 includes a control chip constituting a primary control circuit, a semiconductor chip constituting a secondary power circuit, and a transmission circuit for electrically insulating the primary control circuit and the secondary power circuit and for signal transmission between the primary control circuit and the secondary power circuit. The substrate H has a conductive portion K. The power converter A1 includes a connecting terminal T1 disposed on the substrate H and electrically connected to the conductive portion K. The power converter A1 includes a conductive path D1 that is at least partially formed by the conductive portion K of the substrate H, and that electrically connects the primary control circuit and the connecting terminal T1. Such a configuration contributes to downsizing the power converter A1.
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公开(公告)号：US20210075418A1
公开(公告)日：2021-03-11
申请号：US16965943
申请日：2019-02-22
Applicant: ROHM CO., LTD.
Inventor： Yuji ISHIMATSU
IPC: H03K17/284 , H02M1/08 , H03K17/16 , H03K17/687 , H03K19/003 , H03K19/0185
Abstract: A filter circuit includes a first rise delay circuit that delays a rising time of a first shifted signal by a predetermined time for output and a first fall delay circuit that delays a falling time of a second shifted signal by a predetermined time for output. The first rise delay circuit is configured so that a second rise delay signal does not follow a change in a first voltage toward a decreasing side and follows a change in the first voltage toward an increasing side. The first fall delay circuit is configured so that a second fall delay signal does not follow a change in the first voltage toward a decreasing side and follows a change in the first voltage toward an increasing side.
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公开(公告)号：US20240348247A1
公开(公告)日：2024-10-17
申请号：US18752356
申请日：2024-06-24
Applicant: ROHM CO., LTD.
Inventor： Yuji ISHIMATSU
IPC: H03K17/16 , H01L23/498 , H01L25/07 , H02M7/48
CPC classification number: H03K17/165 , H01L25/071 , H02M7/48 , H01L23/49833 , H01L23/49861
Abstract: A semiconductor device includes an inverter circuit having a first switching element and a second switching element, a first control circuit, a second control circuit, and a limiting unit. The first switching element is supplied with a power supply voltage. The second switching element includes a first terminal connected to the first switching element, a second terminal connected to ground, and a control terminal. The first control circuit controls the first switching element. The second control circuit controls the second switching element. The limiting unit reduces fluctuation in voltage between the second terminal and the control terminal based on voltage fluctuation at the second terminal of the second switching element.
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Patent Agency Ranking
公开(公告)号：US20230420428A1
公开(公告)日：2023-12-28
申请号：US18464169
申请日：2023-09-08
Applicant: ROHM CO., LTD.
Inventor： Yuji ISHIMATSU , Ryuichi FURUTANI
IPC: H01L25/16 , H01L23/31 , H01L23/495 , H01L23/522 , H01L23/00
CPC classification number: H01L25/16 , H01L23/3107 , H01L23/49562 , H01L23/49568 , H01L23/49575 , H01L23/5227 , H01L24/06 , H01L24/48 , H01L24/49 , H01L24/73 , H01L2224/0603 , H01L2224/48091 , H01L2224/48139 , H01L2224/48247 , H01L2224/4903 , H01L2224/49111 , H01L2224/49113 , H01L2224/49171 , H01L2224/73265 , H01L2924/182 , H01L2924/19042 , H01L2924/19105
Abstract: A semiconductor device A1 includes a substrate 3, a conductive section 5 formed on the substrate 3 and including a conductive material, a lead 1A located on the substrate 3, a semiconductor chip 4A located on the lead 1A, a control chip 4G located on the substrate 3 and electrically connected to the conductive section 5 and the semiconductor chip 4A for controlling an operation of the semiconductor chip 4A, and a resin 7 covering the semiconductor chip 4A, the control chip 4G, at least a part of the substrate 3 and a part of the lead 1A. This configuration contributes to achieving a higher level of integration of the semiconductor device.
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公开(公告)号：US20230083231A1
公开(公告)日：2023-03-16
申请号：US17800825
申请日：2021-02-15
Applicant: ROHM CO., LTD.
Inventor： Yuji ISHIMATSU , Kenji HAMA , Hideo HARA
Abstract: An electronic device includes a first electronic component including a first main body, a second electronic component including a second main body, a mounting substrate having a mounting surface, and a heat dissipator having an attaching surface. The mounting surface and the attaching surface face each other in the z direction. The first main body and the second main body are disposed between the mounting substrate and the heat dissipator in the z direction and arranged side by side in the x direction. The first main body has a first front surface facing the attaching surface and a first back surface facing the mounting surface. The second main body has a second front surface facing the attaching surface and a second back surface facing the mounting surface. The dimension of the second main body in the z direction is smaller than the dimension of the first main body in the z direction. The first front surface and the second front surface overlap with each other as viewed in the x direction. A gap is provided between the second back surface and the mounting surface.
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公开(公告)号：US20230052108A1
公开(公告)日：2023-02-16
申请号：US17792364
申请日：2021-02-12
Applicant: ROHM CO., LTD.
Inventor： Kenji HAMA , Yuji ISHIMATSU , Hideo HARA
IPC: H01L23/498 , H01L23/00 , H01L25/16 , H01L23/31
Abstract: A semiconductor device includes a substrate, a conductive part, a controller module and a sealing resin. The substrate has a substrate obverse surface and a substrate reverse surface facing away from each other in a z direction. The conductive part is made of an electrically conductive material on the substrate obverse surface. The controller module is disposed on the substrate obverse surface and electrically connected to the conductive part. The sealing resin covers the controller module and at least a portion of the substrate. The conductive part includes an overlapping wiring trace having an overlapping portion overlapping with the electronic component as viewed in the z direction. The overlapping portion of the overlapping wiring trace is not electrically bonded to the controller module.
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公开(公告)号：US20220321118A1
公开(公告)日：2022-10-06
申请号：US17846856
申请日：2022-06-22
Applicant: ROHM CO., LTD.
Inventor： Yuji ISHIMATSU
Abstract: A semiconductor device includes an inverter circuit having a first switching element and a second switching element, a first control circuit, a second control circuit, and a limiting unit. The first switching element is supplied with a power supply voltage. The second switching element includes a first terminal connected to the first switching element, a second terminal connected to ground, and a control terminal. The first control circuit controls the first switching element. The second control circuit controls the second switching element. The limiting unit reduces fluctuation in voltage between the second terminal and the control terminal based on voltage fluctuation at the second terminal of the second switching element.
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公开(公告)号：US20180040540A1
公开(公告)日：2018-02-08
申请号：US15666055
申请日：2017-08-01
Applicant: ROHM CO., LTD.
Inventor： Yasumasa KASUYA , Hiroaki MATSUBARA , Hiroshi KUMANO , Toshio NAKAJIMA , Shigeru HIRATA , Yuji ISHIMATSU
IPC: H01L23/495 , H02P6/12 , H02P6/14
Abstract: A power module includes a first die pad, a first switching element, a second die pad, a second switching element, an integrated circuit element, an encapsulation resin, and a lead frame assembly. The encapsulation resin encapsulates the first switching element, the second switching element, and the integrated circuit element. The lead frame assembly includes an outer lead and an inner lead. The lead frame assembly includes a first lead frame and a second lead frame. The first lead frame includes a first inner lead connected to the first die pad and a first outer lead connected to the first inner lead. The second lead frame includes a second inner lead connected to the second die pad and a second outer lead connected to the second inner lead.
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