公开(公告)号：US07808225B2

公开(公告)日：2010-10-05

申请号：US11547416

申请日：2005-03-24

申请人： Ralf Burdenski ,  Pieter Gerrit Blanken ,  Giuseppe Grillo ,  Derk Reefman

发明人： Ralf Burdenski ,  Pieter Gerrit Blanken ,  Giuseppe Grillo ,  Derk Reefman

IPC分类号： G05F1/445

CPC分类号： H02M3/1584 ,  Y10T307/50

摘要： A power supply system comprises a parallel arrangement of a first switched mode power supply (1) which has a first system bandwidth (LB 1) and a second switched mode power supply (2) which has a second system bandwidth (LB2) covering higher frequencies than the first system bandwidth (LB 1). The first switched mode power supply (1) is dimensioned to supply a first maximal output power (P1m), the second switched mode power supply (2) is dimensioned to supply a second maximal output power (P2m) being smaller than the first maximal output power (P1m). A control circuit (3) varies a reference voltage (Vr) of both the first switched mode power supply (1) and the second switched mode power supply (2) to obtain a corresponding variation of an output voltage (Vout) of the parallel arrangement.

摘要翻译： 电源系统包括具有第一系统带宽（LB1）和第二开关模式电源（2）的第一开关模式电源（1）的并联布置，所述第一开关模式电源具有覆盖较高频率的第二系统带宽（LB2） 比第一个系统带宽（LB 1）。 第一开关模式电源（1）的尺寸设定为提供第一最大输出功率（P1m），第二开关模式电源（2）的尺寸被设计成提供小于第一最大输出功率的第二最大输出功率（P2m） 功率（P1m）。 控制电路（3）改变第一开关模式电源（1）和第二开关模式电源（2）两者的参考电压（Vr），以获得并联装置的输出电压（Vout）的相应变化 。

公开(公告)号：US20080205497A1

公开(公告)日：2008-08-28

申请号：US11916055

申请日：2006-05-22

申请人： Josephus Arnoldus Henricus Maria Kahlman ,  Derk Reefman

发明人： Josephus Arnoldus Henricus Maria Kahlman ,  Derk Reefman

IPC分类号： H04B1/38

CPC分类号： G01N35/00732

摘要： A semiconductor chip (CHP) and a semiconductor chip driver (RDR) communicate with each other in a wireless fashion. To that end, the semiconductor chip driver (RDR) generates an energy flux (FX1; FX2) that is concentrated on a transducer area (AT1; AT2) of the semiconductor chip (CHP). In the semiconductor chip (CHP), a wireless communication interlace (WCI) provides an electrical signal to a signal processing circuit in response to the energy flux (FX1; FX2). The signal processing circuit occupies an area (AS) that is substantially separate from the transducer area (AT1; AT2) on which the energy flux (FX1; FX2) is concentrated.

摘要翻译： 半导体芯片（CHP）和半导体芯片驱动器（RDR）以无线方式彼此通信。 为此，半导体芯片驱动器（RDR）产生集中在半导体芯片（CHP）的换能器区域（AT 1; AT 2）上的能量通量（FX1; FX2）。 在半导体芯片（CHP）中，无线通信交错（WCI）响应于能量通量（FX1; FX2）向信号处理电路提供电信号。 信号处理电路占据与能量通量（FX1; FX2）集中的换能器区域（AT 1; AT 2）基本分离的区域（AS）。

公开(公告)号：US07345606B2

公开(公告)日：2008-03-18

申请号：US10588115

申请日：2005-01-18

申请人： Derk Reefman ,  Adrianus Johannes Maria Van Tuijl

发明人： Derk Reefman ,  Adrianus Johannes Maria Van Tuijl

IPC分类号： H03M3/00

CPC分类号： H03M3/50 ,  H03M3/382 ,  H03M7/3022

摘要： Consistent with an example embodiment a, DA-converter system comprises the cascade of a multi-bit sigma-delta modulator and a DA-converter. The quantization noise of the sigma-delta modulator is isolated; the isolated quantization noise is word-length reduced in a second noise shaper with frequency independent signal transfer function and the isolated word-length reduced quantization noise is subtracted from the quantization noise of said cascade. In another embodiment, the isolated quantization noise is amplified before and attenuated after the second noise shaper.

摘要翻译： 与示例实施例a一致，DA转换器系统包括多位Σ-Δ调制器和DA转换器的级联。 Σ-Δ调制器的量化噪声被隔离; 隔离量化噪声在具有频率无关信号传递函数的第二噪声整形器中被字长减小，并且从所述级联的量化噪声中减去隔离字长减小的量化噪声。 在另一个实施例中，隔离量化噪声在第二噪声整形器之前被放大，并在第二噪声整形器之后衰减。

公开(公告)号：US07302303B2

公开(公告)日：2007-11-27

申请号：US10502171

申请日：2002-12-23

申请人： Derk Reefman ,  Bernardus Antonius Maria Zwaans

发明人： Derk Reefman ,  Bernardus Antonius Maria Zwaans

IPC分类号： G06F17/00

CPC分类号： G11B20/10527 ,  G11B2020/00065

摘要： A mixing system for mixing a plurality of digital audio signals, at least one of which is a noise-shaped oversampled digital audio signal having a predetermined sampling frequency and bit resolution, said system comprising a summing unit for computing a sum signal of said plurality of input signals; a clipping unit having an input for receiving said sum signal, said clipping unit clipping said sum signal; further comprising a filter unit between the input terminals and the clipping unit, arranged to selectively suppress frequency components outside an audio frequency band from the sum signal; and a converter unit arranged to receive a clipped sum signal from the clipping unit and to convert said clipped sum signal into an output signal of said bit resolution, using noise-shaping, the clipping unit being arranged to limit the input values to a range of values that the converter is able to handle in a stable manner.

摘要翻译： 一种用于混合多个数字音频信号的混合系统，其中至少一个是具有预定采样频率和比特分辨率的噪声形状的过采样数字音频信号，所述系统包括一个求和单元，用于计算所述多个 输入信号 剪切单元，具有用于接收所述和信号的输入，所述剪切单元限制所述和信号; 进一步包括在所述输入端和所述剪切单元之间的滤波器单元，被布置成从所述和信号有选择地抑制音频频带外的频率分量; 以及转换器单元，其被布置为从所述剪切单元接收剪切和信号，并且使用噪声整形将所述剪切的和信号转换成所述比特分辨率的输出信号，所述剪切单元被布置为将输入值限制到 转换器能够以稳定的方式处理的值。

公开(公告)号：US20050075744A1

公开(公告)日：2005-04-07

申请号：US10502171

申请日：2002-12-23

申请人： Derk Reefman ,  Bernardus Zwaans

发明人： Derk Reefman ,  Bernardus Zwaans

IPC分类号： G11B20/00 ,  G11B20/10 ,  G06F17/00 ,  H04B1/00

CPC分类号： G11B20/10527 ,  G11B2020/00065

摘要： A mixing system for mixing a plurality of digital audio signals, at least one of which is a noise-shaped oversampled digital audio signal having a predetermined sampling frequency and bit resolution, said system comprising a summing unit for computing a sum signal of said plurality of input signals; a clipping unit having an input for receiving said sum signal, said clipping unit clipping said sum signal; further comprising a filter unit between the input terminals and the clipping unit, arranged to selectively suppress frequency components outside an audio frequency band from the sum signal; and a converter unit arranged to receive a clipped sum signal from the clipping unit and to convert said clipped sum signal into an output signal of said bit resolution, using noise-shaping, the clipping unit being arranged to limit the input values to a range of values that the converter is able to handle in a stable manner.

摘要翻译： 一种用于混合多个数字音频信号的混合系统，其中至少一个是具有预定采样频率和比特分辨率的噪声形状的过采样数字音频信号，所述系统包括一个求和单元，用于计算所述多个 输入信号 剪切单元，具有用于接收所述和信号的输入，所述剪切单元限制所述和信号; 进一步包括在所述输入端和所述剪切单元之间的滤波器单元，被布置成从所述和信号有选择地抑制音频频带外的频率分量; 以及转换器单元，其被布置为从所述剪切单元接收剪切和信号，并且使用噪声整形将所述剪切的和信号转换成所述比特分辨率的输出信号，所述剪切单元被布置为将输入值限制到 转换器能够以稳定的方式处理的值。

公开(公告)号：US20050001749A1

公开(公告)日：2005-01-06

申请号：US10495538

申请日：2002-10-28

申请人： Derk Reefman ,  Petrus Antonius Cornelis Nuijten

发明人： Derk Reefman ,  Petrus Antonius Cornelis Nuijten

IPC分类号： H03M3/02 ,  H03M1/00 ,  H03M3/00

CPC分类号： H03M3/344 ,  H03M3/358 ,  H03M3/412

摘要： Sigma-delta modulation is provided, comprising feeding an input signal to a first SDM, subtracting the output of the first SDM from the input signal, filtering the output of the subtracting to obtain a filtered signal, delaying the input signal, adding the filtered signal to the delayed signal, feeding the output of the adder to a second SDM and providing the output of the second SDM. The first SDM in combination with the subtracting and filtering delivers a correction signal which, by adding it to the input signal, reduces the distortion in the second SDM, which second SDM performs in fact the sigma-delta modulation of the device.

公开(公告)号：US08729665B2

公开(公告)日：2014-05-20

申请号：US12599494

申请日：2008-05-08

申请人： Johan H. Klootwijk ,  Freddy Roozeboom ,  Jaap Ruigrok ,  Derk Reefman

发明人： Johan H. Klootwijk ,  Freddy Roozeboom ,  Jaap Ruigrok ,  Derk Reefman

IPC分类号： H01L21/02

CPC分类号： H01L27/0805 ,  H01L23/481 ,  H01L28/90 ,  H01L2224/73204

摘要： An integration substrate for a system in package comprises a through-substrate via and a trench capacitor wherein with a trench filling that includes at least four electrically conductive capacitor-electrode layers in an alternating arrangement with dielectric layers. —The capacitor-electrode layers are alternatingly connected to a respective one of two capacitor terminals provided on the first or second substrate side. The trench capacitor and the through-substrate via are formed in respective trench openings and via openings in the semiconductor substrate, which have an equal lateral extension exceeding 10 micrometer. This structure allows, among other advantages, a particularly cost-effective fabrication of the integration substrate because the via openings and the trench openings in the substrate can be fabricated simultaneously.

摘要翻译： 用于封装系统的集成衬底包括贯穿衬底通孔和沟槽电容器，其中沟槽填充物包括与电介质层交替布置的至少四个导电电容器电极层。 - 电容器电极层交替地连接到设置在第一或第二基板侧上的两个电容器端子中的相应一个。 沟槽电容器和贯穿基板通孔形成在半导体衬底中的相应的沟槽开口和通孔中，其具有超过10微米的相等的横向延伸。 除了其它优点之外，这种结构允许一体化衬底的特别成本有效的制造，因为可以同时制造衬底中的通孔开口和沟槽开口。

公开(公告)号：US20090287493A1

公开(公告)日：2009-11-19

申请号：US11915478

申请日：2006-05-16

申请人： Erwin Janssen ,  Derk Reefman

发明人： Erwin Janssen ,  Derk Reefman

IPC分类号： G10L19/00 ,  H03M3/00 ,  H03M1/06

CPC分类号： H03M7/3006 ,  G10L19/167 ,  G11B20/10481 ,  G11B20/10527 ,  G11B20/1262 ,  G11B2020/00014 ,  G11B2020/00065 ,  G11B2020/10546 ,  G11B2020/1288 ,  G11B2220/2541 ,  G11B2220/2579 ,  H03M7/3028

摘要： An audio coding scheme allowing PCM signal to lossless DSD signal expansion for next generation optical disc formats. The method of encoding an input DSD signal includes up-sampling a corresponding PCM signal to the DSD sample rate. Then a set of loop filter parameters for a noise-shaping loop of a sigma-delta modulator are generated, either using a random starting condition of the sigma-delta modulator or including synchronization parameters. This will allow a decoder to regenerate an almost perfect signal, but still it needs a correction signal to be able to bit identically regenerate the DSD input signal. Therefore, a correction signal is generated based on a difference between a sigma-delta modulated version of the up-sampled PCM signal and the input DSD signal, wherein the sigma-delta modulated version of the up-sampled PCM signal is obtained using the set of loop filter parameters. The correction signal may be adapted to be applied to the low bit PCM signal, to the up-sampled PCM signal or to the output bit stream. Finally, an expansion bit stream is generated where an encoded version of the set of loop filter parameters and an encoded version of the correction signal are included. The decoder can reproduce the original DSD signal based on the already available PCM signal and the described expansion bit stream. Thus, the coding scheme enables top quality audio with minimal storage overhead since the already available PCM signal is used in combination with an expansion bit stream. Since only an additional data stream is required to be stored on a disc, e.g. as part of an MPEG stream, DSD functionality is added to existing systems without causing compatibility problems.

摘要翻译： 音频编码方案允许PCM信号对下一代光盘格式的无损DSD信号扩展。 编码输入DSD信号的方法包括将对应的PCM信号上采样到DSD采样率。 然后，使用Σ-Δ调制器的随机起始条件或包括同步参数来生成Σ-Δ调制器的噪声整形环路的一组环路滤波器参数。 这将允许解码器重新生成几乎完美的信号，但是仍然需要一个校正信号以能够相同地重新生成DSD输入信号。 因此，基于上采样PCM信号的Σ-Δ调制版本与输入DSD信号之间的差产生校正信号，其中使用该集合获得上采样PCM信号的Σ-Δ调制版本 的环路滤波器参数。 校正信号可适用于低位PCM信号，上采样PCM信号或输出比特流。 最后，生成扩展位流，其中包括一组环路滤波器参数的编码版本和校正信号的编码版本。 解码器可以基于已经可用的PCM信号和所描述的扩展位流再现原始DSD信号。 因此，由于已经可用的PCM信号与扩展位流结合使用，所以编码方案实现了具有最小存储开销的顶级质量音频。 由于只需要另外的数据流来存储在盘上， 作为MPEG流的一部分，DSD功能被添加到现有系统中，而不会引起兼容性问题。

公开(公告)号：US20090146760A1

公开(公告)日：2009-06-11

申请号：US12300813

申请日：2007-05-14

申请人： Derk Reefman ,  Roozeboom Freddy ,  Johan H. Klootwijk

发明人： Derk Reefman ,  Roozeboom Freddy ,  Johan H. Klootwijk

IPC分类号： H03H7/00

CPC分类号： H01L27/0805 ,  H01L23/3107 ,  H01L23/3128 ,  H01L23/4334 ,  H01L23/49575 ,  H01L23/5223 ,  H01L23/5227 ,  H01L23/642 ,  H01L23/645 ,  H01L25/16 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/056 ,  H01L2224/16 ,  H01L2924/01087 ,  H01L2924/1461 ,  H01L2924/19041 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/00014

摘要： The chip (100) comprises a network of trench capacitors (102) and an inductor (114), wherein the trench capacitors (102) are coupled in parallel with a pattern of interconnects (113A,B, . . . ) that is designed so as to limit generation of eddy current induced by the inductor (114) in the interconnects (113A,B, . . . ). This allows the use of the chip (100) as a portion of a DC-DC converter, that is integrated in an assembly of a first chip and this—second chip (100). The inductor of this integrated DC-DC converter may be defined elsewhere within the assembly.

摘要翻译： 芯片（100）包括沟槽电容器（102）和电感器（114）的网络，其中沟槽电容器（102）与设计的互连图案（113A，B ...）并联耦合 以限制由互连（113A，B ...）中的电感器（114）引起的涡流的产生。 这允许使用芯片（100）作为集成在第一芯片和第二芯片（100）的组件中的DC-DC转换器的一部分。 该集成DC-DC转换器的电感器可以在组件内的其他地方定义。

公开(公告)号：US20070152859A1

公开(公告)日：2007-07-05

申请号：US10588115

申请日：2005-01-18

申请人： Derk Reefman ,  Adrianus Van Tuijl

发明人： Derk Reefman ,  Adrianus Van Tuijl

IPC分类号： H03M1/66

CPC分类号： H03M3/50 ,  H03M3/382 ,  H03M7/3022

摘要： A DA-converter system comprises the cascade of a multi-bit sigma-delta modulator and a DA-converter. The quantization noise of the sigma-delta modulator is isolated, the isolated quantization noise is word-length reduced in a second noise shaper with frequency independent signal transfer function and the isolated word-length reduced quantization noise is subtracted from the quantization noise of said cascade. Preferably the isolated quantization noise is amplified before and attenuated after the second noise shaper.

摘要翻译： DA转换器系统包括多位Σ-Δ调制器和DA转换器的级联。 Σ-Δ调制器的量化噪声被隔离，在具有频率无关的信号传递函数的第二个噪声整形器中隔离的量化噪声被减少，并且从所述级联的量化噪声中减去隔离的字长减小的量化噪声 。 优选地，隔离量化噪声在第二噪声整形器之后被放大并且被衰减。