公开(公告)号：US20150095515A1

公开(公告)日：2015-04-02

申请号：US14128453

申请日：2013-09-27

Applicant: Ramamurthy Krithivas ,  Jacek Reniecki ,  Daniel P. Daly ,  Madhusudhan Rangarajan

Inventor： Ramamurthy Krithivas ,  Jacek Reniecki ,  Daniel P. Daly ,  Madhusudhan Rangarajan

IPC: H04L29/12

CPC classification number: H04L61/2015 ,  G06F9/00 ,  H04L41/00 ,  H04L49/00 ,  H04L67/1097 ,  H04L67/28

Abstract: A first computational device receives a response generated by a second computational device for a third computational device. A target that is suitable for use by the third computational device is determined. The response is transmitted with an address of the target to the third computational device.

Abstract translation: 第一计算设备接收由第三计算设备的第二计算设备生成的响应。 确定适合于第三计算装置使用的目标。 将响应与目标的地址一起发送到第三计算设备。

公开(公告)号：US08631150B2

公开(公告)日：2014-01-14

申请号：US11473173

申请日：2006-06-21

Applicant: Ramamurthy Krithivas

Inventor： Ramamurthy Krithivas

IPC: G06F15/16

CPC classification number: G06F3/0661 ,  G06F3/0605 ,  G06F3/0659 ,  G06F3/0689

Abstract: A management request from a management client to perform an operation on a storage element includes an instance identifier identifying the storage element. A translator translates the instance identifier to a storage identifier that uniquely identifies the storage element. The method identifying the operation and the storage identifier is encapsulated in a storage command and forwarded to the storage element.

Abstract translation: 来自管理客户端的对存储元件执行操作的管理请求包括识别存储元件的实例标识符。 翻译器将实例标识符转换为唯一标识存储元件的存储标识符。 识别操作和存储标识符的方法被封装在存储命令中并转发到存储元件。

公开(公告)号：US20200183872A1

公开(公告)日：2020-06-11

申请号：US16790648

申请日：2020-02-13

Applicant: Amit K Srivastava ,  Majid Shushtarian ,  Anand K Enamandram ,  Jared W Havican ,  Jeffrey A Pihlman ,  Michael J Karas ,  Ramamurthy Krithivas ,  Christine Watnik

Inventor： Amit K Srivastava ,  Majid Shushtarian ,  Anand K Enamandram ,  Jared W Havican ,  Jeffrey A Pihlman ,  Michael J Karas ,  Ramamurthy Krithivas ,  Christine Watnik

IPC: G06F13/40 ,  G06F9/4401

Abstract: Methods to dynamically configure, monitor and govern PCH Chipsets in platforms as extended IO-expander(s) and associated apparatus. A multi-role PCH is provided that may be dynamically configured as a legacy PCH to facilitate booting for platforms without bootable CPUs and as IO-expanders in single-socket and multi-socket platforms. A control entity is coupled to the PCHs and is used to effect boot, reset, wake, and power management operations by exchanging handshake singles with the PCHs and providing control inputs to CPUs on the platforms. The single-socket platform configurations include a platform with a CPU with bootable logic coupled to an IO-expander and a platform with a legacy CPU coupled to a legacy PCH. The multi-socket platforms include a platform with a bootable CPU coupled to one or more non-legacy CPUs and employing multiple IO-expanders and platform with a legacy CPU coupled to one or more non-legacy CPUs and coupled to a legacy PCH, and further including one or more PCHs coupled to the non-legacy CPU(s) implemented as IO-expanders.

公开(公告)号：US09098302B2

公开(公告)日：2015-08-04

申请号：US13536449

申请日：2012-06-28

Applicant: Robert Swanson ,  Mallik Bulusu ,  Palsamy Sakthikumar ,  Ramamurthy Krithivas ,  James Steven Burns

Inventor： Robert Swanson ,  Mallik Bulusu ,  Palsamy Sakthikumar ,  Ramamurthy Krithivas ,  James Steven Burns

IPC: G06F9/00 ,  G06F9/44

CPC classification number: G06F9/4406 ,  G06F9/4401

Abstract: Methods and apparatus are disclosed to improve system boot speed. A disclosed example method includes associating a first serial peripheral interface (SPI) with a baseboard management controller (BMC), copying an image from the first SPI to a volatile memory in response to receiving power at the BMC, and in response to receiving an access request associated with the first SPI, providing access to the image stored in the volatile memory.

Abstract translation: 公开了提高系统引导速度的方法和装置。 所公开的示例性方法包括将第一串行外设接口（SPI）与基板管理控制器（BMC）相关联，响应于BMC处的接收功率将图像从第一SPI复制到易失性存储器，以及响应于接收到访问 请求与第一SPI相关联，提供对存储在易失性存储器中的图像的访问。

公开(公告)号：US20060282591A1

公开(公告)日：2006-12-14

申请号：US11147983

申请日：2005-06-08

Applicant: Ramamurthy Krithivas

Inventor： Ramamurthy Krithivas

IPC: G06F13/24

CPC classification number: G06F9/4812

Abstract: Some embodiments include apparatus and method to allocate ports of host bus adapters in computer systems to multiple operating systems in the computer systems. Other embodiments are described and claimed.

公开(公告)号：US08086833B2

公开(公告)日：2011-12-27

申请号：US12206630

申请日：2008-09-08

Applicant: William A. Stevens, Jr. ,  Andrew J. Fish ,  Kirk D. Brannock ,  Robert P. Hale ,  Ramamurthy Krithivas

Inventor： William A. Stevens, Jr. ,  Andrew J. Fish ,  Kirk D. Brannock ,  Robert P. Hale ,  Ramamurthy Krithivas

IPC: G06F9/00 ,  G06F9/24 ,  G06F1/177

CPC classification number: G06F8/54 ,  G06F9/4401

Abstract: A BIOS includes a core and multiple modules. The modules include both those that are platform specific and those that are not platform specific. Each module has a standard interface that allows the core (or other module) to call the module. A platform vendor constructs a BIOS by selecting modules from one or more vendors, which when executed can select modules that are suitable for the platform the BIOS resides in.

Abstract translation: BIOS包括核心和多个模块。 这些模块包括那些具有平台特性的模块，以及不具有平台特性的模块。 每个模块都有一个标准接口，允许核心（或其他模块）调用该模块。 平台供应商通过从一个或多个供应商中选择模块来构建BIOS，当被执行时可以选择适合于BIOS所在平台的模块。

公开(公告)号：US07664892B2

公开(公告)日：2010-02-16

申请号：US12024920

申请日：2008-02-01

Applicant: Ramamurthy Krithivas

Inventor： Ramamurthy Krithivas

IPC: G06F13/00 ,  G06F15/16 ,  G06F17/30

CPC classification number: H04L67/1097 ,  H04L29/06 ,  H04L49/90 ,  H04L69/12 ,  H04L69/16 ,  H04L69/168 ,  H04L69/329

Abstract: Provided are a method, system, and program for managing data read operations of a read command such as a read command packaged in an Internet Small Computer System Interface packet. In one embodiment, a network adapter has a microengine which obtains read target data from a cache coupled to the network adapter to respond to a read command packaged in a packet sent by an initiator over a network. If the network adapter cache does not have the target data addressed by the read command, the read command is forwarded to a target controller coupled to a storage unit to process the read command.

Abstract translation: 提供了一种用于管理读取命令的数据读取操作的方法，系统和程序，诸如打包在因特网小型计算机系统接口分组中的读取命令。 在一个实施例中，网络适配器具有微引擎，其从耦合到网络适配器的高速缓存获得读取目标数据，以响应打包在由网络发起者发送的分组中的读取命令。 如果网络适配器高速缓存没有由读取命令寻址的目标数据，则读取命令被转发到耦合到存储单元的目标控制器以处理读取命令。

公开(公告)号：US6067628A

公开(公告)日：2000-05-23

申请号：US57954

申请日：1998-04-09

Applicant: Ramamurthy Krithivas ,  Sharma Upadhyayula ,  Steve McGowan

Inventor： Ramamurthy Krithivas ,  Sharma Upadhyayula ,  Steve McGowan

IPC: G01R31/30 ,  G06F11/267 ,  G06F1/30

CPC classification number: G06F11/221 ,  G01R31/3004

Abstract: A method for recognizing an overcurrent event in a universal serial bus is described. The method comprises the step of monitoring communication between a first layer and a second layer of the software layers of the universal serial bus. The method further comprises the step of generating a data structure configured to store the communication between the first layer and the second layer. The method also comprises the step of parsing the data structure to locate a data transition indicating the overcurrent event.

Abstract translation: 描述了一种用于识别通用串行总线中的过电流事件的方法。 该方法包括监视通用串行总线的软件层的第一层和第二层之间的通信的步骤。 该方法还包括生成被配置为存储第一层和第二层之间的通信的数据结构的步骤。 该方法还包括分析数据结构以定位指示过电流事件的数据转换的步骤。

公开(公告)号：US20170124358A1

公开(公告)日：2017-05-04

申请号：US14927973

申请日：2015-10-30

Applicant: Ramamurthy Krithivas ,  Donald C. Soltis, JR. ,  Bradley Burres

Inventor： Ramamurthy Krithivas ,  Donald C. Soltis, JR. ,  Bradley Burres

IPC: G06F21/88 ,  G06F21/44

CPC classification number: G06F21/88 ,  G06F8/60 ,  G06F21/44 ,  G06F21/72 ,  G06F21/74

Abstract: An integrated circuit (IC) provisioned for asset protection has a primary circuit portion, such as a microprocessor or system-on-chip, that can be selectively disabled and enabled via an operability control input. The IC includes a secure register to store lock state indicia and unlock criteria, where a signal at the operability control input is responsive to the lock state indicia. In operation, a firmware data store receives and stores firmware code that includes a lock/unlock command, and firmware data that includes an unlock key. An authorization module verifies authenticity of the firmware code. A lock/unlock (LUL) module is operative to write lock state indicia to the secure register based on the lock/unlock command only in response to a positive verification of the authenticity of the firmware code by the authorization module, and to write lock state indicia to the secure register.

公开(公告)号：US20140006764A1

公开(公告)日：2014-01-02

申请号：US13536449

申请日：2012-06-28

Applicant: Robert Swanson ,  Mallik Bulusu ,  Palsamy Sakthikumar ,  Ramamurthy Krithivas ,  James Steven Burns

Inventor： Robert Swanson ,  Mallik Bulusu ,  Palsamy Sakthikumar ,  Ramamurthy Krithivas ,  James Steven Burns

IPC: G06F9/00

CPC classification number: G06F9/4406 ,  G06F9/4401

Abstract: Methods and apparatus are disclosed to improve system boot speed. A disclosed example method includes associating a first serial peripheral interface (SPI) with a baseboard management controller (BMC), copying an image from the first SPI to a volatile memory in response to receiving power at the BMC, and in response to receiving an access request associated with the first SPI, providing access to the image stored in the volatile memory.

Abstract translation: 公开了提高系统引导速度的方法和装置。 所公开的示例性方法包括将第一串行外设接口（SPI）与基板管理控制器（BMC）相关联，响应于BMC处的接收功率将图像从第一SPI复制到易失性存储器，以及响应于接收到访问 请求与第一SPI相关联，提供对存储在易失性存储器中的图像的访问。