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公开(公告)号：US08848110B2
公开(公告)日：2014-09-30
申请号：US12790405
申请日：2010-05-28
申请人： Ramin Khoini-Poorfard , Alan F. Hendrickson , Alessandro Piovaccari , David S. Trager , Aslamali A. Rafi , Abdulkerim L. Coban , David Le Goff
发明人： Ramin Khoini-Poorfard , Alan F. Hendrickson , Alessandro Piovaccari , David S. Trager , Aslamali A. Rafi , Abdulkerim L. Coban , David Le Goff
IPC分类号： H04N5/52 , H04N5/44 , H04L27/02 , H03G3/30 , H04N5/455 , H03G3/00 , H04L27/00 , H04L27/08 , H04N5/04
CPC分类号： H04N5/455 , H03G3/001 , H03G3/002 , H03G3/3068 , H04L27/0002 , H04L27/02 , H04L27/08 , H04N5/04 , H04N5/52
摘要： A receiver circuit includes an analog front-end and a digital processing unit. The analog front-end includes an input for receiving a radio frequency (RF) signal, a first control input for receiving a gain adjustment signal, a second control input for receiving a timing signal, and a signal output for providing a digital intermediate frequency (IF) signal. The analog front-end updates gains of a plurality of gain stages according to the gain adjustment signal and in synchronism with the timing signal. The digital processing unit is configured to produce at least one output signal derived from the digital IF signal. The digital processing unit includes a timing recovery circuit configured to generate the timing signal based on the digital IF signal to control timing of the updating gains of each of the plurality of adjustable gain stages.
摘要翻译： 接收机电路包括模拟前端和数字处理单元。 模拟前端包括用于接收射频（RF）信号的输入，用于接收增益调整信号的第一控制输入，用于接收定时信号的第二控制输入和用于提供数字中频的信号输出（ IF）信号。 模拟前端根据增益调整信号更新多个增益级的增益并与定时信号同步。 数字处理单元被配置为产生从数字IF信号导出的至少一个输出信号。 数字处理单元包括定时恢复电路，其被配置为基于数字IF信号生成定时信号，以控制多个可调增益级中的每一个的更新增益的定时。
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公开(公告)号：US20130279636A1
公开(公告)日：2013-10-24
申请号：US13923824
申请日：2013-06-21
申请人： Ramin Khoini-Poorfard , Alessandro Piovaccari , Aslamali A. Rafi , Mustafa H. Koroglu , David S. Trager , Abdulkerim L. Coban
发明人： Ramin Khoini-Poorfard , Alessandro Piovaccari , Aslamali A. Rafi , Mustafa H. Koroglu , David S. Trager , Abdulkerim L. Coban
IPC分类号： H04B1/28
摘要： A receiver includes an input section, a plurality of RF sections, an output circuit, and a controller. The input section receives and amplifies a radio frequency (RF) input signal to provide an amplified RF signal, and has a gain input. The plurality of RF sections each have an input for receiving the amplified RF signal, and an output for providing an intermediate frequency signal. The output circuit provides an intermediate frequency output signal in response to an output of at least one of the plurality of RF sections. The controller has an output coupled to the gain input of the input section.
摘要翻译： 接收机包括输入部分，多个RF部分，输出电路和控制器。 输入部分接收和放大射频（RF）输入信号以提供放大的RF信号，并具有增益输入。 多个RF部分各自具有用于接收放大的RF信号的输入端和用于提供中频信号的输出端。 输出电路响应于多个RF部分中的至少一个的输出而提供中频输出信号。 控制器具有耦合到输入部分的增益输入的输出。
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3.发明授权公开(公告)号：US08145170B2
公开(公告)日：2012-03-27
申请号：US12277908
申请日：2008-11-25
IPC分类号： H04B1/06
CPC分类号： H04B15/06 , H03J2200/10 , H04N5/44 , H04N5/4446
摘要： A receiver (400) includes a tracking bandpass filter (420), a tunable lowpass filter (434), a local oscillator (442), and a mixer (444). The tracking bandpass filter (420) has an input for receiving a radio frequency (RF) input signal, and an output. The tunable lowpass filter (434) has an input coupled to the output of the tracking bandpass filter (420), and an output. The local oscillator (422) has a first output for providing a local oscillator signal, which is characterized as being a square wave signal at the desired intermediate frequency (IF). The mixer (444) has a first input coupled to the output of the tunable lowpass filter (434), a second input coupled to the output of the local oscillator (442), and a first output for providing an IF signal at the desired IF. The tunable lowpass filter (434) is configured to substantially attenuate a third harmonic of the frequency of the local oscillator signal.
摘要翻译： 接收器（400）包括跟踪带通滤波器（420），可调谐低通滤波器（434），本地振荡器（442）和混频器（444）。 跟踪带通滤波器（420）具有用于接收射频（RF）输入信号和输出的输入。 可调谐低通滤波器（434）具有耦合到跟踪带通滤波器（420）的输出的输入和输出。 本地振荡器（422）具有用于提供本地振荡器信号的第一输出，其被表征为在期望的中频（IF）下的方波信号。 混频器（444）具有耦合到可调谐低通滤波器（434）的输出的第一输入端，耦合到本地振荡器（442）的输出端的第二输入端和用于在期望的IF 。 可调谐低通滤波器（434）被配置为基本上衰减本地振荡器信号的频率的三次谐波。
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公开(公告)号：US20110235758A1
公开(公告)日：2011-09-29
申请号：US12790405
申请日：2010-05-28
申请人： Ramin Khoini-Poorfard , Alan F. Hendrickson , Alessandro Piovaccari , David S. Trager , Aslamali A. Rafi , Abdulkerim L. Coban , David Le Goff
发明人： Ramin Khoini-Poorfard , Alan F. Hendrickson , Alessandro Piovaccari , David S. Trager , Aslamali A. Rafi , Abdulkerim L. Coban , David Le Goff
CPC分类号： H04N5/455 , H03G3/001 , H03G3/002 , H03G3/3068 , H04L27/0002 , H04L27/02 , H04L27/08 , H04N5/04 , H04N5/52
摘要： A receiver circuit includes an analog front-end and a digital processing unit. The analog front-end includes an input for receiving a radio frequency (RF) signal, a first control input for receiving a gain adjustment signal, a second control input for receiving a timing signal, and a signal output for providing a digital intermediate frequency (IF) signal. The analog front-end updates gains of a plurality of gain stages according to the gain adjustment signal and in synchronism with the timing signal. The digital processing unit is configured to produce at least one output signal derived from the digital IF signal. The digital processing unit includes a timing recovery circuit configured to generate the timing signal based on the digital IF signal to control timing of the updating gains of each of the plurality of adjustable gain stages.
摘要翻译： 接收机电路包括模拟前端和数字处理单元。 模拟前端包括用于接收射频（RF）信号的输入，用于接收增益调整信号的第一控制输入，用于接收定时信号的第二控制输入和用于提供数字中频的信号输出（ IF）信号。 模拟前端根据增益调整信号更新多个增益级的增益并与定时信号同步。 数字处理单元被配置为产生从数字IF信号导出的至少一个输出信号。 数字处理单元包括定时恢复电路，其被配置为基于数字IF信号生成定时信号，以控制多个可调增益级中的每一个的更新增益的定时。
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5.发明申请公开(公告)号：US20110244820A1
公开(公告)日：2011-10-06
申请号：US13160564
申请日：2011-06-15
申请人： Ramin Khoini-Poorfard , Alessandro Piovaccari , Aslamali A. Rafi , Mustafa H. Koroglu , David S. Trager , Abdulkerim L. Coban
发明人： Ramin Khoini-Poorfard , Alessandro Piovaccari , Aslamali A. Rafi , Mustafa H. Koroglu , David S. Trager , Abdulkerim L. Coban
摘要： An integrated wideband receiver includes first and second signal processing paths and a controller. The first signal processing path has an input, and an output for providing a first processed signal, and comprises a first tracking bandpass filter having a first integrated inductor. The second signal processing path has an input, and an output for providing a second processed signal, and comprises a second tracking bandpass filter having a second integrated inductor. The controller is for enabling one of the first and second signal processing paths corresponding to a selected channel of a radio frequency (RF) input signal to provide an output signal. The controller, the first integrated inductor, and said second integrated inductor are formed on a single integrated circuit chip.
摘要翻译： 集成宽带接收机包括第一和第二信号处理路径和控制器。 第一信号处理路径具有输入和用于提供第一处理信号的输出，并且包括具有第一集成电感器的第一跟踪带通滤波器。 第二信号处理路径具有输入和用于提供第二处理信号的输出，并且包括具有第二集成电感器的第二跟踪带通滤波器。 控制器用于启用与射频（RF）输入信号的选定信道相对应的第一和第二信号处理路径之一以提供输出信号。 控制器，第一集成电感器和所述第二集成电感器形成在单个集成电路芯片上。
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6.发明授权公开(公告)号：US08494470B2
公开(公告)日：2013-07-23
申请号：US13160564
申请日：2011-06-15
申请人： Ramin Khoini-Poorfard , Alessandro Piovaccari , Aslamali A. Rafi , Mustafa H. Koroglu , David S. Trager , Abdulkerim L. Coban
发明人： Ramin Khoini-Poorfard , Alessandro Piovaccari , Aslamali A. Rafi , Mustafa H. Koroglu , David S. Trager , Abdulkerim L. Coban
IPC分类号： H04B1/06
摘要： An integrated wideband receiver includes first and second signal processing paths and a controller. The first signal processing path has an input, and an output for providing a first processed signal, and comprises a first tracking bandpass filter having a first integrated inductor. The second signal processing path has an input, and an output for providing a second processed signal, and comprises a second tracking bandpass filter having a second integrated inductor. The controller is for enabling one of the first and second signal processing paths corresponding to a selected channel of a radio frequency (RF) input signal to provide an output signal. The controller, the first integrated inductor, and said second integrated inductor are formed on a single integrated circuit chip.
摘要翻译： 集成宽带接收机包括第一和第二信号处理路径和控制器。 第一信号处理路径具有输入和用于提供第一处理信号的输出，并且包括具有第一集成电感器的第一跟踪带通滤波器。 第二信号处理路径具有输入和用于提供第二处理信号的输出，并且包括具有第二集成电感器的第二跟踪带通滤波器。 控制器用于启用与射频（RF）输入信号的选定信道相对应的第一和第二信号处理路径之一以提供输出信号。 控制器，第一集成电感器和所述第二集成电感器形成在单个集成电路芯片上。
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公开(公告)号：US09647623B2
公开(公告)日：2017-05-09
申请号：US12571092
申请日：2009-09-30
CPC分类号： H04B1/16 , H03G3/3068
摘要： A signal processor for a radio frequency (RF) receiver includes a plurality of distributed signal processing elements, in which a first one receives an input signal and a last one provides an output signal, and a plurality of gain elements interspersed between pairs of said plurality of distributed signal processing elements. The signal processor also includes a like plurality of peak detectors coupled to outputs of corresponding ones of said plurality of gain elements, and an automatic gain controller having inputs coupled to outputs of each of the peak detectors, and outputs coupled to each of the plurality of gain elements. The automatic gain controller independently controls each of the plurality of gain elements to form a like plurality of independent automatic gain control (AGC) loops.
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8.发明申请Signal Processor Suitable for Low Intermediate Frequency (LIF) or Zero Intermediate Frequency (ZIF) Operation 有权信号处理器适用于低中频（LIF）或零中频（ZIF）操作公开(公告)号：US20110076977A1
公开(公告)日：2011-03-31
申请号：US12571092
申请日：2009-09-30
IPC分类号： H04B1/06
CPC分类号： H04B1/16 , H03G3/3068
摘要： A signal processor for a radio frequency (RF) receiver includes a plurality of distributed signal processing elements, in which a first one receives an input signal and a last one provides an output signal, and a plurality of gain elements interspersed between pairs of said plurality of distributed signal processing elements. The signal processor also includes a like plurality of peak detectors coupled to outputs of corresponding ones of said plurality of gain elements, and an automatic gain controller having inputs coupled to outputs of each of the peak detectors, and outputs coupled to each of the plurality of gain elements. The automatic gain controller independently controls each of the plurality of gain elements to form a like plurality of independent automatic gain control (AGC) loops.
摘要翻译： 一种用于射频（RF）接收机的信号处理器包括多个分布式信号处理元件，其中第一个接收输入信号，最后一个提供输出信号，并且多个增益元素散布在所述多个 的分布式信号处理元件。 信号处理器还包括耦合到所述多个增益元件中对应的增益元件的相应输出端的相同的多个峰值检测器，以及具有耦合到每个峰值检测器的输出的输入的自动增益控制器，以及耦合到多个 获得元素。 自动增益控制器独立地控制多个增益元件中的每一个以形成相同的多个独立的自动增益控制（AGC）回路。
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公开(公告)号：US08729925B2
公开(公告)日：2014-05-20
申请号：US13526060
申请日：2012-06-18
申请人： András Vince Horvath , Abdulkerim L. Coban , Pio Balmelli , Ramin Khoini-Poorfard , Alessandro Piovaccari
发明人： András Vince Horvath , Abdulkerim L. Coban , Pio Balmelli , Ramin Khoini-Poorfard , Alessandro Piovaccari
IPC分类号： H03K19/0175 , H03B1/00 , H03L5/00
CPC分类号： H04N5/50 , H03J5/24 , H04L25/0292 , H04N5/165 , H04N5/455 , H04N21/42607
摘要： In one embodiment, an internal buffer may be provided within an integrated circuit (IC) to convert a signal to an output current to be output via a pin of the IC, under control of a switch which can be controlled based on a configuration setting of the IC, and may selectively directly couple the signal to the pin when the IC is coupled to an external driver circuit.
摘要翻译： 在一个实施例中，内部缓冲器可以设置在集成电路（IC）内，以在开关的控制下将信号转换成经由IC的引脚输出的输出电流，该开关可以基于配置设置 IC，并且当IC耦合到外部驱动器电路时，可以选择性地将信号耦合到引脚。
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公开(公告)号：US20130335639A1
公开(公告)日：2013-12-19
申请号：US13526060
申请日：2012-06-18
申请人： András Vince Horvath , Abdulkerim L. Coban , Pio Balmelli , Ramin Khoini-Poorfard , Alessandro Piovaccari
发明人： András Vince Horvath , Abdulkerim L. Coban , Pio Balmelli , Ramin Khoini-Poorfard , Alessandro Piovaccari
CPC分类号： H04N5/50 , H03J5/24 , H04L25/0292 , H04N5/165 , H04N5/455 , H04N21/42607
摘要： In one embodiment, an internal buffer may be provided within an integrated circuit (IC) to convert a signal to an output current to be output via a pin of the IC, under control of a switch which can be controlled based on a configuration setting of the IC, and may selectively directly couple the signal to the pin when the IC is coupled to an external driver circuit.
摘要翻译： 在一个实施例中，内部缓冲器可以设置在集成电路（IC）内，以在开关的控制下将信号转换成经由IC的引脚输出的输出电流，该开关可以基于配置设置 IC，并且当IC耦合到外部驱动器电路时，可以选择性地将信号耦合到引脚。
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