Upsampling filter having one-bit multipliers for multiple spread-data streams
    1.
    发明授权
    Upsampling filter having one-bit multipliers for multiple spread-data streams 有权
    具有用于多个扩展数据流的一位乘法器的上采样滤波器

    公开(公告)号:US06603804B1

    公开(公告)日:2003-08-05

    申请号:US09411152

    申请日:1999-10-01

    IPC分类号: H04B169

    CPC分类号: H03H17/0223

    摘要: A transmit portion of a WB-CDMA transceiver generates one or more spread data streams having values represented by a single bit, allowing for filtering of spread and combined data streams with a root raised cosine (RRC) filter employing single-bit multipliers. The RRC filter is a digital filter that i) employs multiplication of two values in which the length of at least one value is one bit; ii) is preferably implemented with muxs or a simple logic operator; and iii) may employ upsampling and modulation encoding of filter coefficients to reduce the coefficient length to, for example, one bit. The RRC filter may be an FIR filter having either one-bit or multi-bit coefficients, and apply RRC filtering to a spread user stream either before or after the spread user streams are combined. For some implementations, RRC filters are employed to filter each spread user stream prior to combining several processed user steams. For other implementations, the multi-bit valued data stream representing the combined user streams is upsampled to form an upsampled data stream of single-bit values, and RRC filtering is then applied to the upsampled data stream. Alternatively, implementations may use upsampled RRC filter coefficients that allow RRC filtering on the combined spread user streams represented as a sequence of multi-bit values.

    摘要翻译: WB-CDMA收发器的发送部分产生具有由单个比特表示的值的一个或多个扩展数据流,允许使用单比特乘法器的根升余弦(RRC)滤波器对扩展和组合数据流进行滤波。 RRC滤波器是数字滤波器,其i)采用其中至少一个值的长度为1比特的两个值的乘法; ii)优选地用多路复用器或简单的逻辑运算符实现; 和iii)可以采用滤波器系数的上采样和调制编码来将系数长度减小到例如一位。 RRC滤波器可以是具有一比特或多比特系数的FIR滤波器,并且在扩展用户流合并之前或之后对扩展用户流应用RRC滤波。 对于一些实现方式,采用RRC滤波器来在组合若干已处理的用户流之前过滤每个扩展用户流。 对于其他实施方式,表示组合用户流的多位值数据流被上采样以形成单位值的上采样数据流,然后将RRC滤波应用于上采样数据流。 或者,实现可以使用上采样的RRC滤波器系数,其允许对表示为多位值序列的组合扩展用户流进行RRC过滤。

    Tunable filter with bypass
    2.
    发明授权
    Tunable filter with bypass 失效
    带旁路的可调滤波器

    公开(公告)号:US06618579B1

    公开(公告)日:2003-09-09

    申请号:US09405744

    申请日:1999-09-24

    IPC分类号: H04B140

    CPC分类号: H03H11/1291 H03J2200/10

    摘要: An electrical circuit which includes a filter bypass mode. The circuit includes an amplifier including an inverting terminal, a noninverting terminal and an output terminal, at least one first capacitor coupled to the inverting terminal of the amplifier through at least one first switch, and, at least one second capacitor coupled to the noninverting terminal of the amplifier through at least one second switch. The electrical circuit provides filtering when the first and second switches are in a first state, and when the first and second switches are in a second state, the electrical circuit provides substantially no filtering.

    摘要翻译: 一种包括滤波器旁路模式的电路。 电路包括放大器,其包括反相端子,非反相端子和输出端子,至少一个第一电容器,其通过至少一个第一开关耦合到放大器的反相端子,以及耦合到非反相端子的至少一个第二电容器 的放大器通过至少一个第二开关。 当第一和第二开关处于第一状态时,电路提供滤波,并且当第一和第二开关处于第二状态时,电路基本上不提供滤波。

    Dual Antenna System Having One Phase Lock Loop
    3.
    发明申请
    Dual Antenna System Having One Phase Lock Loop 有权
    双天线系统具有单相锁定环路

    公开(公告)号:US20080166988A1

    公开(公告)日:2008-07-10

    申请号:US12048033

    申请日:2008-03-13

    IPC分类号: H04B10/06

    CPC分类号: H04B1/30

    摘要: Circuits, systems, and methods are disclosed for controlling multiple antenna receive paths in a wireless communication device. In some embodiments, the circuit may include a pair of receiving antennas, a first receive path including a VCO coupled to receive a PLL signal and a first mixer coupled to receive a first signal from the VCO and a signal from one of the antennas, and a second receive path integrated separately from the first receive path including a second mixer coupled to receive a second signal from the VCO and a signal from the other antenna. By utilizing the output of the VCO to tune the first and second mixers in the first and second receive paths to the same phase and frequency, control of the multiple antenna receive paths may be optimized.

    摘要翻译: 公开了用于控制无线通信设备中的多个天线接收路径的电路,系统和方法。 在一些实施例中,电路可以包括一对接收天线,包括耦合以接收PLL信号的VCO的第一接收路径和耦合以从VCO接收第一信号的第一混频器和来自天线之一的信号,以及 与第一接收路径分离地集成的第二接收路径,包括耦合以从VCO接收第二信号的第二混频器和来自另一天线的信号。 通过利用VCO的输出来将第一和第二接收路径中的第一和第二混频器调谐到相同的相位和频率,可以优化多个天线接收路径的控制。

    Power-up circuit for analog circuits
    4.
    发明授权
    Power-up circuit for analog circuits 有权
    模拟电路的上电电路

    公开(公告)号:US06285223B1

    公开(公告)日:2001-09-04

    申请号:US09571912

    申请日:2000-05-16

    申请人: Malcolm H. Smith

    发明人: Malcolm H. Smith

    IPC分类号: H03L700

    CPC分类号: G05F3/30

    摘要: A start-up circuit for supplying current to an analog circuit. The start-up circuit comprises a capacitor connected to a current mirror. A power-up signal input to the start-up circuit causes the capacitor to discharge to the current mirror thereby causing the current mirror to provide a current to the analog circuit.

    摘要翻译: 用于向模拟电路供电的启动电路。 启动电路包括连接到电流镜的电容器。 输入到启动电路的上电信号使电容器放电到电流镜,从而使电流镜向模拟电路提供电流。

    Method and Apparatus for Downconverting a Plurality of Frequency Modulated Signals from a Carrier Frequency to Baseband
    5.
    发明申请
    Method and Apparatus for Downconverting a Plurality of Frequency Modulated Signals from a Carrier Frequency to Baseband 有权
    用于将多个频率调制信号从载波频率下变频到基带的方法和装置

    公开(公告)号:US20120214435A1

    公开(公告)日:2012-08-23

    申请号:US13459508

    申请日:2012-04-30

    IPC分类号: H04B1/16

    CPC分类号: H04B1/30

    摘要: Circuits, systems, and methods are disclosed for controlling multiple antenna receive paths in a wireless communication device. In some embodiments, the circuit may include a pair of receiving antennas, a first receive path including a VCO coupled to receive a PLL signal and a first mixer coupled to receive a first signal from the VCO and a signal from one of the antennas, and a second receive path integrated separately from the first receive path including a second mixer coupled to receive a second signal from the VCO and a signal from the other antenna. By utilizing the output of the VCO to tune the first and second mixers in the first and second receive paths to the same phase and frequency, control of the multiple antenna receive paths may be optimized.

    摘要翻译: 公开了用于控制无线通信设备中的多个天线接收路径的电路,系统和方法。 在一些实施例中,电路可以包括一对接收天线,包括耦合以接收PLL信号的VCO的第一接收路径和耦合以从VCO接收第一信号的第一混频器和来自天线之一的信号,以及 与第一接收路径分离地集成的第二接收路径,包括耦合以从VCO接收第二信号的第二混频器和来自另一天线的信号。 通过利用VCO的输出将第一和第二接收路径中的第一和第二混频器调谐到相同的相位和频率,可以优化多个天线接收路径的控制。

    Loop filter with active capacitor and method for generating a reference
    6.
    发明授权
    Loop filter with active capacitor and method for generating a reference 有权
    带有源电容的环路滤波器和产生参考的方法

    公开(公告)号:US07005929B2

    公开(公告)日:2006-02-28

    申请号:US10726166

    申请日:2003-12-02

    申请人: Malcolm H. Smith

    发明人: Malcolm H. Smith

    IPC分类号: H03K5/00 H03L7/085

    摘要: A loop filter for a frequency synthesizer provides a lower frequency pole with a smaller capacitor than conventional filters. The loop-filter comprises a resistor and a smaller capacitor in a series-feedback path, and a transconductor to sense a voltage across the resistor to either source or sink additional current proportional to the sensed voltage. The transconductor and the smaller capacitor may provide a larger capacitance. The loop filter also may comprise an operational amplifier having the smaller capacitor and the resistor in the series-feedback path to receive pulses from a charge pump. The filter may integrate the pulses and may generate a control voltage related to a width of the pulses.

    摘要翻译: 用于频率合成器的环路滤波器提供比常规滤波器更小的电容器的较低频率极点。 环路滤波器包括串联反馈路径中的电阻器和较小的电容器,以及用于感测电阻器两端的电压以便源或吸收与感测电压成比例的附加电流的跨导体。 跨导体和较小的电容器可以提供更大的电容。 环路滤波器还可以包括具有较小电容器的运算放大器和串联反馈路径中的电阻器以接收来自电荷泵的脉冲。 滤波器可以集成脉冲并且可以产生与脉冲宽度相关的控制电压。

    Power-up circuit for analog circuit
    7.
    发明授权
    Power-up circuit for analog circuit 有权
    模拟电路上电电路

    公开(公告)号:US06259240B1

    公开(公告)日:2001-07-10

    申请号:US09574860

    申请日:2000-05-19

    申请人: Malcolm H. Smith

    发明人: Malcolm H. Smith

    IPC分类号: G05F316

    CPC分类号: G05F1/468 Y10S323/901

    摘要: A start-up circuit for providing current to an analog circuit wherein the analog circuit contains an operational amplifier. The start-up circuit makes use of normal operation of the analog circuit to perform a power-up function. A node being powered up is at substantially all times controlled by the operational amplifier, minimizing performance variation resulting from process and temperature variations.

    摘要翻译: 一种用于向模拟电路提供电流的启动电路,其中模拟电路包含运算放大器。 启动电路利用模拟电路的正常工作来执行上电功能。 上电的节点基本上全部由运算放大器控制,最小化由过程和温度变化导致的性能变化。

    Dual antenna system having one phase lock loop
    8.
    发明授权
    Dual antenna system having one phase lock loop 有权
    双天线系统具有一个锁相环

    公开(公告)号:US08170518B2

    公开(公告)日:2012-05-01

    申请号:US12048033

    申请日:2008-03-13

    IPC分类号: H04B1/06 H04B7/00

    CPC分类号: H04B1/30

    摘要: Circuits, systems, and methods are disclosed for controlling multiple antenna receive paths in a wireless communication device. In some embodiments, the circuit may include a pair of receiving antennas, a first receive path including a VCO coupled to receive a PLL signal and a first mixer coupled to receive a first signal from the VCO and a signal from one of the antennas, and a second receive path integrated separately from the first receive path including a second mixer coupled to receive a second signal from the VCO and a signal from the other antenna. By utilizing the output of the VCO to tune the first and second mixers in the first and second receive paths to the same phase and frequency, control of the multiple antenna receive paths may be optimized.

    摘要翻译: 公开了用于控制无线通信设备中的多个天线接收路径的电路,系统和方法。 在一些实施例中,电路可以包括一对接收天线,包括耦合以接收PLL信号的VCO的第一接收路径和耦合以从VCO接收第一信号的第一混频器和来自天线之一的信号,以及 与第一接收路径分离地集成的第二接收路径,包括耦合以从VCO接收第二信号的第二混频器和来自另一天线的信号。 通过利用VCO的输出来将第一和第二接收路径中的第一和第二混频器调谐到相同的相位和频率,可以优化多个天线接收路径的控制。

    Sigma-delta conversion with analog, nonvolatile trimmed quantized feedback
    10.
    发明授权
    Sigma-delta conversion with analog, nonvolatile trimmed quantized feedback 失效
    具有模拟,非易失性微调量化反馈的Sigma-delta转换

    公开(公告)号:US06891488B1

    公开(公告)日:2005-05-10

    申请号:US10696946

    申请日:2003-10-30

    摘要: An Nth-order sigma-delta analog-to-digital converter (ADC) system having multilevel quantized feedback. A multilevel quantized feedback stage incorporates a multibit, current-mode digital-to-analog converter (DAC). In one embodiment, reference current sources for the DAC may comprise a plurality of floating-gate MOS transistors so that analog nonvolatile precision linearity trimming of the feedback DAC may be accomplished. Calibration of the DAC may be performed at a relatively low refresh rate, for example, only at instances when the sigma-delta ADC system is activated.

    摘要翻译: 具有多电平量化反馈的第N个Σ-Δ模数转换器(ADC)系统。 多电平量化反馈级采用多位电流模式数模转换器(DAC)。 在一个实施例中,用于DAC的参考电流源可以包括多个浮栅MOS晶体管,使得可以实现反馈DAC的模拟非易失性精度线性修整。 DAC的校准可以以相对低的刷新速率执行,例如仅在Σ-ΔADC系统被激活的情况下执行。