Three stage algorithm for automatic gain control in a receiver system
    1.
    发明授权
    Three stage algorithm for automatic gain control in a receiver system 失效
    一种接收机系统中自动增益控制的三阶段算法

    公开(公告)号:US07778617B2

    公开(公告)日:2010-08-17

    申请号:US11898614

    申请日:2007-09-13

    IPC分类号: H04B1/06

    CPC分类号: H03G3/3068 H03G1/0088

    摘要: In an embodiment, a receiver for processing a RF input signal having a variable signal strength includes an RF amplifier, an IF amplifier, and a controller. The RF amplifier is configured to receive and amplify the RF input signal. The IF amplifier is coupled to an output of the RF amplifier. The controller controls gains of the RF amplifier and the IF amplifier during times of falling signal strength. A gain of the IF amplifier is increased as the signal strength falls until a first amplitude threshold is reached for the falling signal strength. If the signal strength falls beyond the first threshold, a gain of the RF amplifier is increased until a second amplitude threshold is reached. The second amplitude threshold is lower than the first amplitude threshold. If the signal strength falls below the second amplitude threshold, the gain of the IF amplifier is further increased.

    摘要翻译: 在一个实施例中,用于处理具有可变信号强度的RF输入信号的接收器包括RF放大器,IF放大器和控制器。 RF放大器被配置为接收和放大RF输入信号。 IF放大器耦合到RF放大器的输出。 控制器在信号强度下降期间控制RF放大器和IF放大器的增益。 随着信号强度下降,IF放大器的增益增加,直到达到下降信号强度的第一幅度阈值为止。 如果信号强度超过第一阈值,则RF放大器的增益增加,直到达到第二幅度阈值。 第二幅度阈值低于第一幅度阈值。 如果信号强度低于第二幅度阈值,则IF放大器的增益进一步增加。

    Three stage algorithm for automatic gain control in a receiver system
    2.
    发明申请
    Three stage algorithm for automatic gain control in a receiver system 失效
    一种接收机系统中自动增益控制的三阶段算法

    公开(公告)号:US20080242249A1

    公开(公告)日:2008-10-02

    申请号:US11898614

    申请日:2007-09-13

    IPC分类号: H04B1/06

    CPC分类号: H03G3/3068 H03G1/0088

    摘要: In an embodiment, a receiver for processing a RF input signal having a variable signal strength includes an RF amplifier, an IF amplifier, and a controller. The RF amplifier is configured to receive and amplify the RF input signal. The IF amplifier is coupled to an output of the RF amplifier. The controller controls gains of the RF amplifier and the IF amplifier during times of falling signal strength. A gain of the IF amplifier is increased as the signal strength falls until a first amplitude threshold is reached for the falling signal strength. If the signal strength falls beyond the first threshold, a gain of the RF amplifier is increased until a second amplitude threshold is reached. The second amplitude threshold is lower than the first amplitude threshold. If the signal strength falls below the second amplitude threshold, the gain of the IF amplifier is further increased.

    摘要翻译: 在一个实施例中,用于处理具有可变信号强度的RF输入信号的接收器包括RF放大器,IF放大器和控制器。 RF放大器被配置为接收和放大RF输入信号。 IF放大器耦合到RF放大器的输出。 控制器在信号强度下降期间控制RF放大器和IF放大器的增益。 随着信号强度下降,IF放大器的增益增加,直到达到下降信号强度的第一幅度阈值为止。 如果信号强度超过第一阈值,则RF放大器的增益增加,直到达到第二幅度阈值。 第二幅度阈值低于第一幅度阈值。 如果信号强度低于第二幅度阈值,则IF放大器的增益进一步增加。

    Quadrature receiver sampling architecture
    3.
    发明申请
    Quadrature receiver sampling architecture 有权
    正交接收机采样架构

    公开(公告)号:US20070053468A1

    公开(公告)日:2007-03-08

    申请号:US11593273

    申请日:2006-11-06

    IPC分类号: H04L27/22

    CPC分类号: H04L27/00

    摘要: Quadrature receiver sampling architecture. A signal ADC performs analog to digital conversion for both I and Q streams. An analog MUX selects the appropriate I and the Q baseband analog input streams for input to the ADC at the appropriate time. A digital filter may also be employed to compensate for any introduced delay between the samples of the I and Q channel when seeking to recover the symbols that have been transmitted to a communication receiver that employs this quadrature receiver architecture and/or signal processing. In one embodiment, if an ADC is clocked at a rate of substantially twice the sample rate of the I and Q channels, there will be a one-half sample clock delay between the digital I and digital Q data at the output of the ADC. This delay is then removed before the demodulator processes the input signals to recover the transmitted symbols.

    摘要翻译: 正交接收机采样架构。 信号ADC为I和Q流执行模数转换。 模拟MUX在适当的时间选择适当的I和Q基带模拟输入流输入ADC。 还可以采用数字滤波器来补偿在I和Q信道的样本之间的任何引入的延迟,当寻求恢复已被发送到使用该正交接收器架构和/或信号处理的通信接收机的符号时。 在一个实施例中,如果ADC以基本上是I和Q通道的采样率的两倍的速率被计时,则在ADC的输出处的数字I和数字Q数据之间将存在二分之一采样时钟延迟。 然后在解调器处理输入信号之前去除该延迟以恢复发送的符号。

    Systems and methods for performing phase tracking within an ADC-based tuner
    4.
    发明授权
    Systems and methods for performing phase tracking within an ADC-based tuner 有权
    用于在基于ADC的调谐器内执行相位跟踪的系统和方法

    公开(公告)号:US08817860B2

    公开(公告)日:2014-08-26

    申请号:US13609060

    申请日:2012-09-10

    申请人: Tommy Yu

    发明人: Tommy Yu

    IPC分类号: H04B3/46

    摘要: Systems and methods for performing phase tracking scheme for an Analog to Digital converter based tuner. In many embodiments, a phase tracking scheme is used that includes a phase locked loop that corrects the phase of the output signals and an amplitude modulation compensator that modulates the amplitude of the output digital signals to compensate for phase noise based upon the received output digital signals.

    摘要翻译: 用于执行基于模数转换器的调谐器的相位跟踪方案的系统和方法。 在许多实施例中,使用相位跟踪方案,其包括校正输出信号的相位的锁相环路和调制输出数字信号的幅度以根据所接收的输出数字信号补偿相位噪声的幅度调制补偿器 。

    Scalable Architecture for Satellite Channel Switch
    5.
    发明申请
    Scalable Architecture for Satellite Channel Switch 有权
    卫星通道交换机的可扩展架构

    公开(公告)号:US20120281788A1

    公开(公告)日:2012-11-08

    申请号:US13550484

    申请日:2012-07-16

    申请人: Ramon GOMEZ Tommy Yu

    发明人: Ramon GOMEZ Tommy Yu

    IPC分类号: H04L27/00

    CPC分类号: H04B1/18

    摘要: A frequency translation module for a broadband multi-channel communication system may include an analog signal converter, a digital channel selection device, and a digital-to-analog (D/A) converter. The analog signal converter is configured to receive a plurality of analog signals, to select analog signals residing in a predefined frequency band, and to convert each of the selected analog signals into a digital signal. The digital channel selection device is configured to process digital signals corresponding to the selected analog signals and to generate a composite output of digital signals representative of the selected analog signals. The D/A converter is configured to translate the composite output to an analog signal output decodable by a receiver. Further, the frequency translation module may include a mixer configured to upconvert the analog signal output to a frequency decodable by the receiver.

    摘要翻译: 用于宽带多通道通信系统的频率转换模块可以包括模拟信号转换器,数字通道选择装置和数模(D / A)转换器。 模拟信号转换器被配置为接收多个模拟信号,以选择驻留在预定频带中的模拟信号,并将所选择的模拟信号中的每一个转换为数字信号。 数字通道选择装置被配置为处理对应于所选择的模拟信号的数字信号,并产生表示所选模拟信号的数字信号的复合输出。 D / A转换器被配置为将复合输出转换成可由接收器解码的模拟信号输出。 此外,频率转换模块可以包括配置成将模拟信号输出上变频到由接收机解码的频率的混频器。

    Method and system for satellite communication
    6.
    发明授权
    Method and system for satellite communication 有权
    卫星通信方法与系统

    公开(公告)号:US08259852B2

    公开(公告)日:2012-09-04

    申请号:US11692702

    申请日:2007-03-28

    申请人: Tommy Yu

    发明人: Tommy Yu

    IPC分类号: H03K9/00

    摘要: Certain aspects of a method and system for satellite communication are disclosed. Aspects of one method may include a receiver that handles digital video broadcasting. The receiver may be enabled to dynamically vary spacing between one or more pilots within at least one frame based on a determined symbol rate. The size of each of a plurality of received programs may be determined and the spacing between one or more pilots may be dynamically varied based on the determined size of each of the plurality of received programs.

    摘要翻译: 公开了用于卫星通信的方法和系统的某些方面。 一种方法的方面可以包括处理数字视频广播的接收机。 可以使接收机能够基于所确定的符号速率动态地改变至少一个帧内的一个或多个导频之间的间隔。 可以确定多个接收节目中的每一个的大小,并且可以基于所确定的多个接收节目中的每一个的大小来动态地改变一个或多个导频之间的间隔。

    Equalizer architecture for data communication
    7.
    发明授权
    Equalizer architecture for data communication 有权
    用于数据通信的均衡器架构

    公开(公告)号:US07715472B2

    公开(公告)日:2010-05-11

    申请号:US11583713

    申请日:2006-10-20

    IPC分类号: H03H7/30 H03K5/159

    摘要: An update algorithm for equalizer coefficients in a communications system using phase correction symbols. Instead of using a traditional all symbols slicer update algorithm, the equalizer is updated during phase correction symbols for optimal performance in low signal-to-noise ratio conditions. In lower signal-to-noise ratio conditions, the equalizer uses a phase correction circuit to compensate for distortion caused by a communication channel when a demodulated data stream contains an unknown phase offsets resulting from a fast dynamic distortion. More specifically, the phase correction circuit uses a phase correction signal to correct for the unknown phase offsets in a demodulated data stream in lower signal-to-noise ratio conditions. The equalizer then corrects for distortion caused by the communication channel based upon the phase corrected demodulated data stream.

    摘要翻译: 一种使用相位校正符号的通信系统中均衡器系数的更新算法。 代替使用传统的所有符号限幅器更新算法,均衡器在相位校正符号期间更新,以在低信噪比条件下实现最佳性能。 在较低的信噪比条件下,当解调的数据流包含由快速动态失真导致的未知相位偏移时,均衡器使用相位校正电路来补偿由通信信道引起的失真。 更具体地,相位校正电路使用相位校正信号来校正在较低信噪比条件下的解调数据流中的未知相位偏移。 然后,均衡器基于相位校正的解调数据流校正由通信信道引起的失真。

    Quadrature receiver sampling architecture
    8.
    发明授权
    Quadrature receiver sampling architecture 有权
    正交接收机采样架构

    公开(公告)号:US07596189B2

    公开(公告)日:2009-09-29

    申请号:US11593273

    申请日:2006-11-06

    IPC分类号: H03K9/00 H04L27/00

    CPC分类号: H04L27/00

    摘要: Quadrature receiver sampling architecture. A signal ADC performs analog to digital conversion for both I and Q streams. An analog MUX selects the appropriate I and the Q baseband analog input streams for input to the ADC at the appropriate time. A digital filter may also be employed to compensate for any introduced delay between the samples of the I and Q channel when seeking to recover the symbols that have been transmitted to a communication receiver that employs this quadrature receiver architecture and/or signal processing. In one embodiment, if an ADC is clocked at a rate of substantially twice the sample rate of the I and Q channels, there will be a one-half sample clock delay between the digital I and digital Q data at the output of the ADC. This delay is then removed before the demodulator processes the input signals to recover the transmitted symbols.

    摘要翻译: 正交接收机采样架构。 信号ADC为I和Q流执行模数转换。 模拟MUX在适当的时间选择适当的I和Q基带模拟输入流输入ADC。 还可以采用数字滤波器来补偿在I和Q信道的样本之间的任何引入的延迟,当寻求恢复已被发送到使用该正交接收器架构和/或信号处理的通信接收机的符号时。 在一个实施例中,如果ADC以基本上是I和Q通道的采样率的两倍的速率被计时,则在ADC的输出处的数字I和数字Q数据之间将存在二分之一采样时钟延迟。 然后在解调器处理输入信号之前去除该延迟以恢复发送的符号。

    Phase tracking in communications systems
    9.
    发明申请
    Phase tracking in communications systems 有权
    通信系统中的相位跟踪

    公开(公告)号:US20070098117A1

    公开(公告)日:2007-05-03

    申请号:US11586668

    申请日:2006-10-26

    IPC分类号: H04L27/06

    摘要: The present invention includes a method of determining a phase estimate for an input signal having pilot symbols. The method includes receiving a plurality of pilot symbols, and then multiplying two or more pilot symbol slots by corresponding correlator coefficients to correct a phase estimate of the input signal.

    摘要翻译: 本发明包括一种确定具有导频符号的输入信号的相位估计的方法。 该方法包括:接收多个导频符号,然后将两个或多个导频符号时隙乘以相应的相关器系数,以校正输入信号的相位估计。

    Systems and methods for selecting digital content channels using low noise block converters including digital channelizer switches
    10.
    发明授权
    Systems and methods for selecting digital content channels using low noise block converters including digital channelizer switches 有权
    使用包括数字信道切换器的低噪声块转换器来选择数字内容信道的系统和方法

    公开(公告)号:US09344262B2

    公开(公告)日:2016-05-17

    申请号:US13355413

    申请日:2012-01-20

    申请人: Tommy Yu

    发明人: Tommy Yu

    IPC分类号: H04L27/06 H04L5/06

    摘要: Systems and methods in accordance with embodiments of the invention include converting satellite signals to an intermediate frequency signal for content decoding, and selecting modulated digital data within the satellite signals for content decoding using digital signal processing. One embodiment includes a system configured to select at least one content channel from an input signal including a plurality of content channels modulated onto a carrier, the system including: a digital channelizer switch including: a high speed analog to digital converter configured to digitize an intermediate frequency signal; a digital channelizer configured to digitally tune a content channel from the digitized intermediate frequency signal; and a high speed digital to analog converter configured to generate an analog output signal using the content channel digitally tuned from the digitized intermediate frequency signal by the digital channelizer.

    摘要翻译: 根据本发明的实施例的系统和方法包括将卫星信号转换为用于内容解码的中频信号,以及使用数字信号处理在卫星信号内选择调制数字数据进行内容解码。 一个实施例包括被配置为从包括调制到载波上的多个内容信道的输入信号中选择至少一个内容信道的系统,所述系统包括:数字信道切换器开关,包括:高速模数转换器,被配置为数字化中间 频率信号; 配置为从数字化的中频信号数字地调谐内容信道的数字信道器; 以及高速数模转换器,被配置为使用由数字通道器从数字化的中频信号数字调谐的内容通道产生模拟输出信号。