摘要:
In an embodiment, a receiver for processing a RF input signal having a variable signal strength includes an RF amplifier, an IF amplifier, and a controller. The RF amplifier is configured to receive and amplify the RF input signal. The IF amplifier is coupled to an output of the RF amplifier. The controller controls gains of the RF amplifier and the IF amplifier during times of falling signal strength. A gain of the IF amplifier is increased as the signal strength falls until a first amplitude threshold is reached for the falling signal strength. If the signal strength falls beyond the first threshold, a gain of the RF amplifier is increased until a second amplitude threshold is reached. The second amplitude threshold is lower than the first amplitude threshold. If the signal strength falls below the second amplitude threshold, the gain of the IF amplifier is further increased.
摘要:
In an embodiment, a receiver for processing a RF input signal having a variable signal strength includes an RF amplifier, an IF amplifier, and a controller. The RF amplifier is configured to receive and amplify the RF input signal. The IF amplifier is coupled to an output of the RF amplifier. The controller controls gains of the RF amplifier and the IF amplifier during times of falling signal strength. A gain of the IF amplifier is increased as the signal strength falls until a first amplitude threshold is reached for the falling signal strength. If the signal strength falls beyond the first threshold, a gain of the RF amplifier is increased until a second amplitude threshold is reached. The second amplitude threshold is lower than the first amplitude threshold. If the signal strength falls below the second amplitude threshold, the gain of the IF amplifier is further increased.
摘要:
Quadrature receiver sampling architecture. A signal ADC performs analog to digital conversion for both I and Q streams. An analog MUX selects the appropriate I and the Q baseband analog input streams for input to the ADC at the appropriate time. A digital filter may also be employed to compensate for any introduced delay between the samples of the I and Q channel when seeking to recover the symbols that have been transmitted to a communication receiver that employs this quadrature receiver architecture and/or signal processing. In one embodiment, if an ADC is clocked at a rate of substantially twice the sample rate of the I and Q channels, there will be a one-half sample clock delay between the digital I and digital Q data at the output of the ADC. This delay is then removed before the demodulator processes the input signals to recover the transmitted symbols.
摘要:
Systems and methods for performing phase tracking scheme for an Analog to Digital converter based tuner. In many embodiments, a phase tracking scheme is used that includes a phase locked loop that corrects the phase of the output signals and an amplitude modulation compensator that modulates the amplitude of the output digital signals to compensate for phase noise based upon the received output digital signals.
摘要:
A frequency translation module for a broadband multi-channel communication system may include an analog signal converter, a digital channel selection device, and a digital-to-analog (D/A) converter. The analog signal converter is configured to receive a plurality of analog signals, to select analog signals residing in a predefined frequency band, and to convert each of the selected analog signals into a digital signal. The digital channel selection device is configured to process digital signals corresponding to the selected analog signals and to generate a composite output of digital signals representative of the selected analog signals. The D/A converter is configured to translate the composite output to an analog signal output decodable by a receiver. Further, the frequency translation module may include a mixer configured to upconvert the analog signal output to a frequency decodable by the receiver.
摘要翻译:用于宽带多通道通信系统的频率转换模块可以包括模拟信号转换器,数字通道选择装置和数模(D / A)转换器。 模拟信号转换器被配置为接收多个模拟信号,以选择驻留在预定频带中的模拟信号,并将所选择的模拟信号中的每一个转换为数字信号。 数字通道选择装置被配置为处理对应于所选择的模拟信号的数字信号,并产生表示所选模拟信号的数字信号的复合输出。 D / A转换器被配置为将复合输出转换成可由接收器解码的模拟信号输出。 此外,频率转换模块可以包括配置成将模拟信号输出上变频到由接收机解码的频率的混频器。
摘要:
Certain aspects of a method and system for satellite communication are disclosed. Aspects of one method may include a receiver that handles digital video broadcasting. The receiver may be enabled to dynamically vary spacing between one or more pilots within at least one frame based on a determined symbol rate. The size of each of a plurality of received programs may be determined and the spacing between one or more pilots may be dynamically varied based on the determined size of each of the plurality of received programs.
摘要:
An update algorithm for equalizer coefficients in a communications system using phase correction symbols. Instead of using a traditional all symbols slicer update algorithm, the equalizer is updated during phase correction symbols for optimal performance in low signal-to-noise ratio conditions. In lower signal-to-noise ratio conditions, the equalizer uses a phase correction circuit to compensate for distortion caused by a communication channel when a demodulated data stream contains an unknown phase offsets resulting from a fast dynamic distortion. More specifically, the phase correction circuit uses a phase correction signal to correct for the unknown phase offsets in a demodulated data stream in lower signal-to-noise ratio conditions. The equalizer then corrects for distortion caused by the communication channel based upon the phase corrected demodulated data stream.
摘要:
Quadrature receiver sampling architecture. A signal ADC performs analog to digital conversion for both I and Q streams. An analog MUX selects the appropriate I and the Q baseband analog input streams for input to the ADC at the appropriate time. A digital filter may also be employed to compensate for any introduced delay between the samples of the I and Q channel when seeking to recover the symbols that have been transmitted to a communication receiver that employs this quadrature receiver architecture and/or signal processing. In one embodiment, if an ADC is clocked at a rate of substantially twice the sample rate of the I and Q channels, there will be a one-half sample clock delay between the digital I and digital Q data at the output of the ADC. This delay is then removed before the demodulator processes the input signals to recover the transmitted symbols.
摘要:
The present invention includes a method of determining a phase estimate for an input signal having pilot symbols. The method includes receiving a plurality of pilot symbols, and then multiplying two or more pilot symbol slots by corresponding correlator coefficients to correct a phase estimate of the input signal.
摘要:
Systems and methods in accordance with embodiments of the invention include converting satellite signals to an intermediate frequency signal for content decoding, and selecting modulated digital data within the satellite signals for content decoding using digital signal processing. One embodiment includes a system configured to select at least one content channel from an input signal including a plurality of content channels modulated onto a carrier, the system including: a digital channelizer switch including: a high speed analog to digital converter configured to digitize an intermediate frequency signal; a digital channelizer configured to digitally tune a content channel from the digitized intermediate frequency signal; and a high speed digital to analog converter configured to generate an analog output signal using the content channel digitally tuned from the digitized intermediate frequency signal by the digital channelizer.