公开(公告)号：US08396998B2

公开(公告)日：2013-03-12

申请号：US12965699

申请日：2010-12-10

申请人： Jerry N. Le ,  Ngoc V. Le ,  Tat Leung Lai ,  Ramon S. Co

发明人： Jerry N. Le ,  Ngoc V. Le ,  Tat Leung Lai ,  Ramon S. Co

IPC分类号： G06F3/00 ,  G06F5/00

CPC分类号： G06F11/273 ,  G11C11/406 ,  G11C29/56 ,  G11C2029/5602

摘要： A diagnostic extender card is plugged into a memory module socket on a personal computer (PC) motherboard. The extender card has a test socket that receives a memory module and an intercepting decoder chip that receives the chip-select (CS) from the motherboard that selects the memory module for access. When CS is activated, the intercepting decoder chip illuminates a visual indicator on the extender card, allowing a user to locate a memory module being accessed. The exact translation or mapping from logical addresses of test programs to physical addresses of the memory modules is not needed, since the visual indicator shows which memory module is really being accessed, regardless of proprietary address mapping by north bridge chips. Operating system memory accesses are filtered out by a counter that counts accesses during a period set by a timer. When the number of accesses exceeds a threshold, the visual indicator is lit.

摘要翻译： 诊断扩展卡插入个人计算机（PC）主板上的内存模块插槽。 扩展卡具有接收存储器模块的测试插座和从主板接收芯片选择（CS）的截取解码器芯片，其选择存储器模块进行访问。 当CS被激活时，拦截解码器芯片照亮扩展卡上的视觉指示符，允许用户定位被访问的存储器模块。 不需要将测试程序的逻辑地址到存储器模块的物理地址的精确翻译或映射，因为可视指示器显示了正在被访问的存储器模块，而不考虑北桥芯片的专有地址映射。 操作系统存储器访问由在定时器设置的周期内对存取进行计数的计数器滤除。 当访问次数超过阈值时，视觉指示灯亮起。

公开(公告)号：US07917327B2

公开(公告)日：2011-03-29

申请号：US12831777

申请日：2010-07-07

申请人： Ramon S. Co ,  Tat Leung Lai ,  Calvin G. Leong

发明人： Ramon S. Co ,  Tat Leung Lai ,  Calvin G. Leong

IPC分类号： G06F19/00 ,  G06F17/40

CPC分类号： B25J9/1666 ,  B25J9/16 ,  G05B19/4182 ,  Y02P90/083

摘要： Two robotic arms roam in separate, non-overlapping areas of a test station, avoiding collisions. A traveling buffer moves along x-tracks between a front position and a back position. In the front position, a first robotic arm loads IC chips from an input tray or stacker into buffer cavities in the traveling buffer. The traveling buffer then moves along the x-tracks to the back position, where a second robotic arm moves chips from the traveling buffer to test boards for testing. After testing, the second robotic arm moves chips to a second traveling buffer, which then moves along tracks to a front position for unloading by the first robotic arm. Two traveling buffers may move on the same tracks in a loop. The buffer cavities in the traveling buffer move on internal tracks to expand and contract spacing and pitch between the front and back positions to match test-board pitch.

摘要翻译： 两个机器人臂在测试台的分开的，不重叠的区域漫游，避免碰撞。 移动缓冲器沿着前方位置和后方位置之间的x轨道移动。 在前置位置，第一机器臂将IC芯片从输入托盘或堆叠器装载到行进缓冲器中的缓冲腔中。 移动缓冲器然后沿x轨道移动到后部位置，其中第二机器人臂将芯片从行进缓冲器移动到测试板进行测试。 在测试之后，第二机器人臂将芯片移动到第二行进缓冲器，然后第二移动缓冲器沿着轨道移动到前部位置，以由第一机器人臂卸载。 两个移动缓冲器可以在循环中的相同轨道上移动。 移动缓冲器中的缓冲腔在内部轨道上移动以在前后位置之间扩展和收缩间距和间距，以匹配测试板间距。

公开(公告)号：US20100274517A1

公开(公告)日：2010-10-28

申请号：US12831777

申请日：2010-07-07

申请人： Ramon S. Co ,  Tat Leung Lai ,  Calvin G. Leong

发明人： Ramon S. Co ,  Tat Leung Lai ,  Calvin G. Leong

IPC分类号： G06F19/00 ,  G05B19/418

CPC分类号： B25J9/1666 ,  B25J9/16 ,  G05B19/4182 ,  Y02P90/083

摘要： Two robotic arms roam in separate, non-overlapping areas of a test station, avoiding collisions. A traveling buffer moves along x-tracks between a front position and a back position. In the front position, a first robotic arm loads IC chips from an input tray or stacker into buffer cavities in the traveling buffer. The traveling buffer then moves along the x-tracks to the back position, where a second robotic arm moves chips from the traveling buffer to test boards for testing. After testing, the second robotic arm moves chips to a second traveling buffer, which then moves along tracks to a front position for unloading by the first robotic arm. Two traveling buffers may move on the same tracks in a loop. The buffer cavities in the traveling buffer move on internal tracks to expand and contract spacing and pitch between the front and back positions to match test-board pitch.

摘要翻译： 两个机器人臂在测试台的分开的，不重叠的区域漫游，避免碰撞。 移动缓冲器沿着前方位置和后方位置之间的x轨道移动。 在前置位置，第一机器臂将IC芯片从输入托盘或堆叠器装载到行进缓冲器中的缓冲腔中。 移动缓冲器然后沿x轨道移动到后部位置，其中第二机器人臂将芯片从行进缓冲器移动到测试板进行测试。 在测试之后，第二机器人臂将芯片移动到第二行进缓冲器，然后第二移动缓冲器沿着轨道移动到前部位置，以由第一机器人臂卸载。 两个移动缓冲器可以在循环中的相同轨道上移动。 移动缓冲器中的缓冲腔在内部轨道上移动以在前后位置之间扩展和收缩间距和间距，以匹配测试板间距。

公开(公告)号：US07509532B2

公开(公告)日：2009-03-24

申请号：US10249841

申请日：2003-05-12

申请人： Ramon S. Co ,  Tat Leung Lai ,  David Da-Wei Sun

发明人： Ramon S. Co ,  Tat Leung Lai ,  David Da-Wei Sun

IPC分类号： G06F11/00

CPC分类号： G01R31/01 ,  G01R31/31713 ,  G01R31/31905 ,  G11C5/04 ,  G11C29/028 ,  G11C29/56 ,  G11C29/56016 ,  G11C2029/5004 ,  H05K1/141

摘要： A test system for testing memory modules uses vertically-mounted personal computer (PC) motherboards. Many test adaptor boards that contain test sockets for testing memory modules are mounted horizontally across a test bench. Each test adaptor board connects to a motherboard that tests the memory modules in the test sockets. The motherboard is mounted below and perpendicularly to the test adaptor board. The motherboard is modified to extend the memory bus to edge contact pads along an edge of the motherboard. An edge socket on the test adaptor board mates with the edge contact pads to make electrical connection. A robotic arm inserts a memory module into the test socket, allowing the vertically-mounted motherboard to execute programs to test the memory module.

摘要翻译： 用于测试存储器模块的测试系统使用垂直安装的个人计算机（PC）主板。 包含用于测试内存模块的测试插槽的许多测试适配器板水平安装在测试台上。 每个测试适配器板连接到测试插槽中的内存模块的主板。 主板安装在测试适配器板的下方并垂直。 主板被修改为沿主板边缘将内存总线扩展到边缘接触焊盘。 测试适配器板上的边缘插座与边缘接触垫匹配以进行电气连接。 机器手臂将内存模块插入测试插座，允许垂直安装的主板执行程序来测试内存模块。

公开(公告)号：US20080126863A1

公开(公告)日：2008-05-29

申请号：US11309296

申请日：2006-07-24

申请人： Ramon S. Co ,  Tat Leung Lai ,  David Sun

发明人： Ramon S. Co ,  Tat Leung Lai ,  David Sun

IPC分类号： G11C29/04 ,  G01R31/26 ,  G06F11/22

CPC分类号： G11C29/56 ,  G11C29/56016 ,  G11C2029/5602

摘要： Memory chips are tested by insertion into a chip test socket on a test adapter board that is mounted to the reverse or solder-side of a personal computer motherboard. A memory module socket is removed from the motherboard, and adapter pins are inserted into holes for the removed memory module socket, but from the reverse (solder) side of the motherboard. The adapter pins connect to the test adapter board either directly, through a connector plug, or through an intervening adapter board. The test adapter board has soldered onto it additional memory chips and buffer chips on a memory module, such as an Advanced Memory Buffer (AMB) for a fully-buffered memory module. The built-in-self-test (BIST) feature of the AMB may be used to test the memory chip under test in the chip test socket, or the processor on the motherboard may write and read the memory chip.

摘要翻译： 通过插入到安装在个人计算机主板的反面或焊接侧的测试适配器板上的芯片测试插座来测试存储芯片。 内存模块插座从主板上拆下，并将适配器插头插入拆卸的内存模块插槽的孔中，但插入主板背面（焊料）侧。 适配器引脚直接连接到测试适配器板，通过连接器插头或插入适配器板。 测试适配器板已经在内存模块上焊接了额外的存储器芯片和缓冲芯片，例如用于全缓冲存储器模块的高级存储器缓冲器（AMB）。 AMB的内置自检（BIST）功能可用于测试芯片测试插座中的待测内存芯片，或者主板上的处理器可能会写入和读取内存芯片。

公开(公告)号：US07131040B2

公开(公告)日：2006-10-31

申请号：US10906318

申请日：2005-02-14

申请人： Ramon S. Co ,  Tat Leung Lai ,  David Sun

发明人： Ramon S. Co ,  Tat Leung Lai ,  David Sun

IPC分类号： G11C29/00

CPC分类号： G01R31/2855 ,  G01R31/2863 ,  G01R31/31905 ,  G11C29/56 ,  G11C29/56004 ,  G11C29/56016 ,  G11C2029/2602

摘要： Hot air blown past memory modules under test in a heat chamber is improved. Hot air entering the chamber from an inlet pipe is split by a manifold and deflectors. Holes in the manifold allow for a relatively even air distribution within the chamber, minimizing temperature variations. Return air is collected by a heat-chamber bottom cover into a return pipe. A heating unit re-heats the return air and blows it into the inlet pipe. One side of the heat chamber is an insulated backplane. Memory modules are inserted into sockets on module motherboards, which are inserted into motherboard sockets on the backplane. On the other side of the backplane, card sockets receive pattern-generator cards outside the heat chamber but electrically connected to the module motherboards through the backplane. The pattern-generator cards exercise the memory modules. The pattern-generator cards are cooled while memory modules in the heat chamber are heated.

摘要翻译： 改进了在热室中被测试的存储器模块的热空气。 从入口管进入腔室的热空气被歧管和导流器分开。 歧管中的孔允许室内相对均匀的空气分布，使温度变化最小化。 返回空气由热室底盖收集回流管。 加热单元重新加热回流空气并将其吹入入口管。 加热室的一侧是绝缘背板。 内存模块插入模块主板上的插座，插入背板主板插槽。 在背板的另一侧，卡插座在加热室外部接收图案发生器卡，但通过背板电连接到模块主板。 图案发生器卡练习内存模块。 图案发生器卡被冷却，而加热室中的存储器模块被加热。

公开(公告)号：US06351827B1

公开(公告)日：2002-02-26

申请号：US09702018

申请日：2000-10-30

申请人： Ramon S. Co ,  Tat Leung Lai ,  Thang Nguyen

发明人： Ramon S. Co ,  Tat Leung Lai ,  Thang Nguyen

IPC分类号： H02H305

CPC分类号： G01R31/01 ,  G01R31/31713 ,  G01R31/31905 ,  G11C5/04 ,  G11C29/028 ,  G11C29/56 ,  G11C29/56016 ,  G11C2029/5004 ,  H05K1/141

摘要： Margin testing of memory modules uses a personal computer (PC) motherboard. A test adaptor board has a test socket that receives a memory module under test. Pins from the test adaptor board are plugged into holes of a removed memory-module socket on the motherboard, mounted on the reverse, solder side of the motherboard. The test adapter board has a voltage regulator that controls the power-supply (Vcc) voltage applied to the module under test. A delay circuit on the test adapter board varies the phase delay of a clock to the memory module under test. Margin control signals are generated by a controller card in the PC's expansion slots, to control Vcc and clock delay to the module under test without changing the motherboard's Vcc voltage. The test program executing on the PC motherboard writes to the controller card to adjust voltage and delay, allowing Vcc and setup and hold margins to be tested.

摘要翻译： 内存模块的保证金测试使用个人计算机（PC）主板。 测试适配器板具有接收被测内存模块的测试插座。 来自测试适配器板的引脚插入主板上拆下的内存模块插槽的孔中，安装在主板的反面焊接面上。 测试适配器板具有一个电压调节器，用于控制施加到被测模块的电源（Vcc）电压。 测试适配器板上的延迟电路将时钟的相位延迟改变为被测存储器模块。 边缘控制信号由PC扩展槽中的控制器卡产生，以控制Vcc和测试模块的时钟延迟，而不会改变主板的Vcc电压。 在PC主板上执行的测试程序向控制器卡写入调整电压和延迟，允许Vcc和设置和保持边沿进行测试。

公开(公告)号：US20130151904A1

公开(公告)日：2013-06-13

申请号：US13760948

申请日：2013-02-06

申请人： Jerry N. Le ,  Ngoc V. Le ,  Tat Leung Lai ,  Ramon S. Co

发明人： Jerry N. Le ,  Ngoc V. Le ,  Tat Leung Lai ,  Ramon S. Co

IPC分类号： G06F11/273

CPC分类号： G06F11/273 ,  G11C11/406 ,  G11C29/56 ,  G11C2029/5602

摘要： A diagnostic extender card is plugged into a memory module socket on a personal computer (PC) motherboard. The extender card has a test socket that receives a memory module and an intercepting decoder chip that receives the chip-select (CS) from the motherboard that selects the memory module for access. When CS is activated, the intercepting decoder chip illuminates a visual indicator on the extender card, allowing a user to locate a memory module being accessed. The exact translation or mapping from logical addresses of test programs to physical addresses of the memory modules is not needed, since the visual indicator shows which memory module is really being accessed, regardless of proprietary address mapping by north bridge chips. Operating system memory accesses are filtered out by a counter that counts accesses during a period set by a timer. When the number of accesses exceeds a threshold, the visual indicator is lit.

摘要翻译： 诊断扩展卡插入个人计算机（PC）主板上的内存模块插槽。 扩展卡具有接收存储器模块的测试插座和从主板接收芯片选择（CS）的截取解码器芯片，其选择存储器模块进行访问。 当CS被激活时，拦截解码器芯片照亮扩展卡上的视觉指示符，允许用户定位被访问的存储器模块。 不需要将测试程序的逻辑地址到存储器模块的物理地址的精确翻译或映射，因为可视指示器显示了正在被访问的存储器模块，而不考虑北桥芯片的专有地址映射。 操作系统存储器访问由在定时器设置的周期内对存取进行计数的计数器滤除。 当访问次数超过阈值时，视觉指示灯亮起。

公开(公告)号：US07478290B2

公开(公告)日：2009-01-13

申请号：US11309296

申请日：2006-07-24

申请人： Ramon S. Co ,  Tat Leung Lai ,  David Sun

发明人： Ramon S. Co ,  Tat Leung Lai ,  David Sun

IPC分类号： G11C29/00

CPC分类号： G11C29/56 ,  G11C29/56016 ,  G11C2029/5602

摘要： Memory chips are tested by insertion into a chip test socket on a test adapter board that is mounted to the reverse or solder-side of a personal computer motherboard. A memory module socket is removed from the motherboard, and adapter pins are inserted into holes for the removed memory module socket, but from the reverse (solder) side of the motherboard. The adapter pins connect to the test adapter board either directly, through a connector plug, or through an intervening adapter board. The test adapter board has soldered onto it additional memory chips and buffer chips on a memory module, such as an Advanced Memory Buffer (AMB) for a fully-buffered memory module. The built-in-self-test (BIST) feature of the AMB may be used to test the memory chip under test in the chip test socket, or the processor on the motherboard may write and read the memory chip.

摘要翻译： 通过插入到安装在个人计算机主板的反面或焊接侧的测试适配器板上的芯片测试插座来测试存储芯片。 内存模块插座从主板上拆下，并将适配器插头插入拆卸的内存模块插槽的孔中，但插入主板背面（焊料）侧。 适配器引脚直接连接到测试适配器板，通过连接器插头或插入适配器板。 测试适配器板已经在内存模块上焊接了额外的存储器芯片和缓冲芯片，例如用于全缓冲存储器模块的高级存储器缓冲器（AMB）。 AMB的内置自检（BIST）功能可用于测试芯片测试插座中的待测内存芯片，或者主板上的处理器可能会写入和读取内存芯片。

公开(公告)号：US07272774B2

公开(公告)日：2007-09-18

申请号：US10709156

申请日：2004-04-16

申请人： Ramon S. Co ,  Tat Leung Lai ,  David Sun

发明人： Ramon S. Co ,  Tat Leung Lai ,  David Sun

IPC分类号： G11C29/00 ,  G06F11/00

CPC分类号： G11C29/24 ,  G06F11/2215 ,  G11C5/04 ,  G11C2029/5602

摘要： Memory modules with an extra dynamic-random-access memory (DRAM) chip for storing error-correction code (ECC) are tested on a personal computer (PC) motherboard tester using a cross-over extender card inserted into a memory module socket on the motherboard. ECC code generated on the motherboard is normally stored in the extra ECC DRAM chip, preventing test patterns such as checkerboards and walking-ones to be written directly to the ECC DRAM chip. During testing, the cross-over extender card routes signals from the motherboard for one of the data DRAM chips to the ECC DRAM chip, while the ECC code is routed to one of the data DRAM chips. The checkerboard or other test pattern is thus written and read from the ECC DRAM chip that normally stores the ECC code. The cross-over extender card can be hardwired, or can have a switch to allow normal operation or testing of the ECC DRAM chip.

摘要翻译： 具有用于存储纠错码（ECC）的额外动态随机存取存储器（DRAM）芯片的存储器模块在个人计算机（PC）主板测试器上使用插入到内存模块插槽中的跨越延长卡进行测试 母板。 在主板上产生的ECC代码通常存储在额外的ECC DRAM芯片中，防止诸如棋盘和步行的测试图案直接写入ECC DRAM芯片。 在测试期间，交叉扩展卡将来自主板的信号从数据DRAM芯片中的一个传送到ECC DRAM芯片，而ECC代码被路由到数据DRAM芯片之一。 因此，棋盘或其他测试图案由通常存储ECC代码的ECC DRAM芯片写入和读出。 交叉扩展卡可以是硬连线的，或者可以有开关来允许ECC DRAM芯片的正常操作或测试。