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    WIRELESS COMMUNICATION PROTOCOL FOR LOW POWER RECEIVERS
    3.
    发明申请
    WIRELESS COMMUNICATION PROTOCOL FOR LOW POWER RECEIVERS 有权
    低功率接收机的无线通信协议

    公开(公告)号：US20130343248A1

    公开(公告)日：2013-12-26

    申请号：US13531874

    申请日：2012-06-25

    申请人： Adam Toner ,  Scott Robert Humphreys ,  Randall Braxton Pugh ,  Daniel B. Otts ,  William Chester Neeley

    发明人： Adam Toner ,  Scott Robert Humphreys ,  Randall Braxton Pugh ,  Daniel B. Otts ,  William Chester Neeley

    IPC分类号： H04W52/02

    CPC分类号： H04W56/0085 ,  Y02D70/00 ,  Y02D70/26

    摘要： A wireless protocol for a communication system is set forth herein which may be utilized for communication between a transmitter and a receiver over any type of communication channel. The wireless communication protocol provides for the reduction of receiver active or on time which in turn lowers power consumption. The wireless communication protocol enables the complexity and receiver size to be reduced. The methodology employed in the protocol utilizes a unique message frame in conjunction with repeated transmission and periodic receiver searching.

    摘要翻译： 本文阐述了用于通信系统的无线协议，其可以用于任何类型的通信信道上的发射机和接收机之间的通信。 无线通信协议提供减少接收器的有效或准时，从而降低功耗。 无线通信协议使复杂度和接收机尺寸得以减小。 在协议中使用的方法利用独特的消息帧结合重复的传输和周期性的接收机搜索。

    Wireless communication protocol for low power receivers
    4.
    发明授权
    Wireless communication protocol for low power receivers 有权
    低功率接收机的无线通信协议

    公开(公告)号：US08724662B2

    公开(公告)日：2014-05-13

    申请号：US13531874

    申请日：2012-06-25

    申请人： Adam Toner ,  Scott Robert Humphreys ,  Randall Braxton Pugh ,  Daniel B. Otts ,  William Chester Neeley

    发明人： Adam Toner ,  Scott Robert Humphreys ,  Randall Braxton Pugh ,  Daniel B. Otts ,  William Chester Neeley

    IPC分类号： H04J3/06

    CPC分类号： H04W56/0085 ,  Y02D70/00 ,  Y02D70/26

    摘要： A wireless protocol for a communication system is set forth herein which may be utilized for communication between a transmitter and a receiver over any type of communication channel. The wireless communication protocol provides for the reduction of receiver active or on time which in turn lowers power consumption. The wireless communication protocol enables the complexity and receiver size to be reduced. The methodology employed in the protocol utilizes a unique message frame in conjunction with repeated transmission and periodic receiver searching.

    摘要翻译： 本文阐述了用于通信系统的无线协议，其可以用于任何类型的通信信道上的发射机和接收机之间的通信。 无线通信协议提供减少接收器的有效或准时，从而降低功耗。 无线通信协议使复杂度和接收机尺寸得以减小。 在协议中使用的方法利用独特的消息帧结合重复的传输和周期性的接收机搜索。

    WIRELESS MUSICAL INSTRUMENT NETWORK AND WIRELESS LINK MODULES
    5.
    发明申请
    WIRELESS MUSICAL INSTRUMENT NETWORK AND WIRELESS LINK MODULES 审中-公开
    无线音乐仪器网络和无线链路模块

    公开(公告)号：US20110038488A1

    公开(公告)日：2011-02-17

    申请号：US12851200

    申请日：2010-08-05

    申请人： Scott Robert Humphreys

    发明人： Scott Robert Humphreys

    IPC分类号： H04B3/00

    CPC分类号： G10H1/0083

    摘要： A wireless musical instrument network (400, 500) may comprise one or more wireless link modules (100, 200, 300). In some embodiments a first wireless link module may be adapted to receive a first input audio signal and transmit a first wireless signal having a modulation component based on the first input audio signal. A second wireless link module may be adapted to receive the first wireless signal and a second input audio signal. The second wireless link module may be further adapted to demodulate the first wireless signal to provide a first received audio signal, and combine the first received audio signal and the second input audio signal to provide a combined audio signal. The second wireless link module may provide a second wireless signal having a modulation component based on the combined audio signal, whereby the combined audio signal and the second wireless signal contain information based on both the first input audio signal and the second input audio signal

    摘要翻译： 无线乐器网络（400,500）可以包括一个或多个无线链路模块（100,200,300）。 在一些实施例中，第一无线链路模块可以适于接收第一输入音频信号，并且基于第一输入音频信号发送具有调制分量的第一无线信号。 第二无线链路模块可以适于接收第一无线信号和第二输入音频信号。 第二无线链路模块还可以适于解调第一无线信号以提供第一接收音频信号，并且组合第一接收音频信号和第二输入音频信号以提供组合音频信号。 第二无线链路模块可以提供具有基于组合音频信号的调制分量的第二无线信号，由此组合音频信号和第二无线信号基于第一输入音频信号和第二输入音频信号两者包含信息

    Compensation for oscillator tuning gain variations in frequency synthesizers
    6.
    发明授权
    Compensation for oscillator tuning gain variations in frequency synthesizers 有权
    频率合成器中振荡器调谐增益变化的补偿

    公开(公告)号：US06724265B2

    公开(公告)日：2004-04-20

    申请号：US10172627

    申请日：2002-06-14

    申请人： Scott Robert Humphreys

    发明人： Scott Robert Humphreys

    IPC分类号： H03L700

    CPC分类号： H03L7/1974 ,  H03L7/0898

    摘要： A system is provided for compensating for tuning gain variations in a phase lock loop. Compensation is performed by a calibration system that estimates the tuning gain of the oscillator and then adjusts the charge pump current value by a ratio of the nominal tuning gain to the measured tun gain. The tuning gain measurement is performed by measuring the change in the voltage controlled oscillator's tuning control voltage when the phase lock loop is locked to two different frequencies, which are separated by a fixed, predetermined amount. The two frequencies may be above or below the final output frequency of the VCO, or the second frequency may be the final frequency in order to reduce calibration time and settling time.

    摘要翻译： 提供了一种用于补偿锁相环中的调谐增益变化的系统。 通过校准系统进行补偿，该校准系统估计振荡器的调谐增益，然后通过额定调谐增益与测量的脉冲增益的比值来调整电荷泵电流值。 调谐增益测量是通过测量当锁相环锁定到两个不同频率的压控振荡器的调谐控制电压的变化来进行的，这两个频率被固定的预定量分开。 两个频率可以高于或低于VCO的最终输出频率，或者第二频率可以是最终频率，以便减少校准时间和稳定时间。

    Phase dithered digital communications system
    7.
    发明授权
    Phase dithered digital communications system 有权
    相位抖动数字通信系统

    公开(公告)号：US08068573B1

    公开(公告)日：2011-11-29

    申请号：US11740967

    申请日：2007-04-27

    申请人： Nadim Khlat ,  Richard A. Summe ,  Scott Robert Humphreys ,  Chris Ngo

    发明人： Nadim Khlat ,  Richard A. Summe ,  Scott Robert Humphreys ,  Chris Ngo

    IPC分类号： H04L7/00 ,  H03L7/00

    CPC分类号： H03K3/84 ,  H03K7/04 ,  H04B15/06

    摘要： The present invention is a phase dithered digital communications system that includes a digital receiver, and uses phase dithering to spread the energy of one or more system clocks to minimize receiver de-sensitization. Phase dithering uses a single frequency for each system clock; however, the energy of each system clock is spread over a range of frequencies by changing the duty-cycle of each clock half-cycle. A non-phase dithered clock drives the sampling clock of a receiver analog-to-digital converter to provide accurate correlation with received information, which may allow use of a higher frequency sampling clock than in frequency dithered designs. Phase dithered clocks and non-phase dithered clocks may have constant frequencies that are related to each other by a ratio of two integers; therefore, the time base used for extracting received data is always correlated and accurate.

    摘要翻译： 本发明是一种相位抖动数字通信系统，其包括数字接收机，并且使用相位抖动来扩展一个或多个系统时钟的能量以最小化接收机去敏感。 相位抖动对每个系统时钟使用单个频率; 然而，每个系统时钟的能量通过改变每个时钟半周期的占空比在一个频率范围内扩展。 非相抖动时钟驱动接收器模拟 - 数字转换器的采样时钟，以提供与接收信息的精确相关性，这可能允许使用比在频率抖动设计中更高频率的采样时钟。 相位抖动时钟和非相位抖动时钟可以具有通过两个整数的比率彼此相关的恒定频率; 因此，用于提取接收到的数据的时基总是相关和准确的。

    System and method for transitioning from one PLL feedback source to another
    8.
    发明授权
    System and method for transitioning from one PLL feedback source to another 有权
    从一个PLL反馈源转换到另一个PLL反馈源的系统和方法

    公开(公告)号：US07412215B1

    公开(公告)日：2008-08-12

    申请号：US11144119

    申请日：2005-06-03

    申请人： Alexander Wayne Hietala ,  Jeffery Peter Ortiz ,  Scott Robert Humphreys

    发明人： Alexander Wayne Hietala ,  Jeffery Peter Ortiz ,  Scott Robert Humphreys

    IPC分类号： H04B1/04

    CPC分类号： H04B1/0475 ,  H03L7/081 ,  H03L7/087 ,  H03L7/16 ,  H03L2207/12

    摘要： A system and method are provided for switching from one phase-locked loop feedback source to another in a radio frequency (RF) transmitter. The RF transmitter includes a phase-locked loop (PLL) that provides a phase-modulated RF input signal and power amplifier circuitry that amplifies the RF input signal to provide an RF output signal. The PLL includes switching circuitry that couples a feedback path of the PLL to an output of the PLL for open loop operation and couples the feedback path of the PLL to an output of the power amplifier circuitry for closed loop operation. Prior to switching the feedback path from the output of the PLL to the output of the power amplifier circuitry, time alignment circuitry operates to time-align feedback signals from the outputs of the PLL and the power amplifier circuitry such that switching from open loop operation to closed loop operation causes minimal phase disturbance.

    摘要翻译： 提供了一种用于在射频（RF）发射机中从一个锁相环反馈源切换到另一个的系统和方法。 RF发射器包括提供相位调制RF输入信号的锁相环（PLL）和放大RF输入信号以提供RF输出信号的功率放大器电路。 PLL包括将PLL的反馈路径耦合到PLL的输出以用于开环操作的开关电路，并将PLL的反馈路径耦合到用于闭环操作的功率放大器电路的输出。 在将反馈路径从PLL的输出切换到功率放大器电路的输出之前，时间对准电路用于对来自PLL和功率放大器电路的输出的反馈信号进行时间对准，使得从开环操作切换到 闭环运行导致最小的相位扰动。

    Pre-distortion system for a synthesizer having modulation applied in the reference path
    9.
    发明授权
    Pre-distortion system for a synthesizer having modulation applied in the reference path 有权
    具有在参考路径中应用的调制的合成器的预失真系统

    公开(公告)号：US07288999B1

    公开(公告)日：2007-10-30

    申请号：US11347956

    申请日：2006-02-06

    申请人： Alexander Wayne Hietala ,  Ryan Lee Bunch ,  Scott Robert Humphreys ,  Barry Travis Hunt, Jr.

    发明人： Alexander Wayne Hietala ,  Ryan Lee Bunch ,  Scott Robert Humphreys ,  Barry Travis Hunt, Jr.

    IPC分类号： H03L7/197 ,  H04L25/49

    CPC分类号： H03L7/1976 ,  H03C3/0966 ,  H03L7/23 ,  H03L2207/12

    摘要： A system providing a phase or frequency modulated signal is provided. In general, the system includes a phase locked loop (PLL) having a fractional-N divider in a reference path of the PLL operating to divide a reference frequency based on a pre-distorted modulation signal. Pre-distortion circuitry operates to provide the pre-distorted modulation signal by pre-distorting a modulation signal such that a convolution, or cascade, of the pre-distortion and a transfer function of the PLL results in a substantially flat frequency response for a range of modulation rates greater than a bandwidth of the PLL.

    摘要翻译： 提供了提供相位或频率调制信号的系统。 通常，该系统包括在PLL的参考路径中具有分数N分频器的锁相环（PLL），其操作以基于预失真调制信号来划分参考频率。 预失真电路通过对调制信号进行预失真来提供预失真调制信号，使得预失真和PLL的传递函数的卷积或级联导致范围内的基本平坦的频率响应 的调制率大于PLL的带宽。

    Phase-locked loop having loop gain and frequency response calibration
    10.
    发明授权
    Phase-locked loop having loop gain and frequency response calibration 有权
    锁相环具有环路增益和频率响应校准

    公开(公告)号：US06731145B1

    公开(公告)日：2004-05-04

    申请号：US10409291

    申请日：2003-04-08

    申请人： Scott Robert Humphreys ,  Barry Travis Hunt, Jr.

    发明人： Scott Robert Humphreys ,  Barry Travis Hunt, Jr.

    IPC分类号： H03L706

    CPC分类号： H03L7/18 ,  H03L7/1075

    摘要： The invention provides an apparatus and method for calibrating both the pole/zero locations and the gain of a charge pump phase-locked loop's (PLL's) frequency response with one calibration operation. In one embodiment, the calibration is performed using a bandgap voltage reference and a stable frequency reference in order to measure a slew rate (I/C), defined as a current-to-capacitance ratio, and then adjusting the RC time constant (tRC) by adjusting the capacitance value. The adjustment setting is used in the loop filter capacitors, thereby calibrating the pole and zero locations of the PLL, which depend on the RC product. The charge pump reference current is proportional to the ratio of the bandgap voltage to the resistor value. When the capacitance is adjusted, the slew rate is calibrated as well, wherein the slew rate represents a portion of the loop gain of the PLL.

    摘要翻译： 本发明提供一种用于通过一次校准操作来校准电极/锁相环（PLL）频率响应的极点/零点位置和增益的装置和方法。 在一个实施例中，使用带隙电压参考和稳定频率参考来执行校准，以便测量被定义为电流 - 电容比的转换速率（I / C），然后调整RC时间常数（tRC ）通过调整电容值。 调节设置用于环路滤波电容器，从而校准PLL的极点和零点位置，这取决于RC产品。 电荷泵参考电流与带隙电压与电阻值的比例成正比。 当调整电容时，压摆率也被校准，其中转换速率表示PLL的环路增益的一部分。