公开(公告)号：US20130230964A1

公开(公告)日：2013-09-05

申请号：US13781737

申请日：2013-02-28

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Akira Imai ,  Toshiaki Iwamatsu ,  Akihiro Nakae

IPC: H01L21/76 ,  H01L21/68

CPC classification number: H01L21/76 ,  H01L21/31053 ,  H01L21/31056 ,  H01L21/68 ,  H01L21/76229 ,  H01L21/76283 ,  H01L23/544 ,  H01L27/1207 ,  H01L2223/5442 ,  H01L2223/54426 ,  H01L2223/5446 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method for manufacturing a semiconductor integrated circuit device includes the step of forming an SOI device region and a bulk device region on an SOI type semiconductor wafer. The method includes: removing a BOX layer and an SOI layer in a bulk device region; and thereafter forming an STI region in both the SOI device region and the bulk device region. In the method, the STI region in the SOI device region is formed to extend through the BOX layer.

Abstract translation: 制造半导体集成电路器件的方法包括在SOI型半导体晶片上形成SOI器件区域和体器件区域的步骤。 该方法包括：去除大容量器件区域中的BOX层和SOI层; 然后在SOI器件区域和本体器件区域中形成STI区域。 在该方法中，SOI器件区域中的STI区域形成为延伸穿过BOX层。

公开(公告)号：US09368385B2

公开(公告)日：2016-06-14

申请号：US13781737

申请日：2013-02-28

Applicant: Renesas Electronics Corporation

Inventor： Akira Imai ,  Toshiaki Iwamatsu ,  Akihiro Nakae

IPC: H01L21/76 ,  H01L21/68 ,  H01L27/12 ,  H01L23/544 ,  H01L21/762 ,  H01L21/3105

CPC classification number: H01L21/76 ,  H01L21/31053 ,  H01L21/31056 ,  H01L21/68 ,  H01L21/76229 ,  H01L21/76283 ,  H01L23/544 ,  H01L27/1207 ,  H01L2223/5442 ,  H01L2223/54426 ,  H01L2223/5446 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method for manufacturing a semiconductor integrated circuit device includes the step of forming an SOI device region and a bulk device region on an SOI type semiconductor wafer. The method includes: removing a BOX layer and an SOI layer in a bulk device region; and thereafter forming an STI region in both the SOI device region and the bulk device region. In the method, the STI region in the SOI device region is formed to extend through the BOX layer.

Abstract translation: 制造半导体集成电路器件的方法包括在SOI型半导体晶片上形成SOI器件区域和体器件区域的步骤。 该方法包括：去除大容量器件区域中的BOX层和SOI层; 然后在SOI器件区域和本体器件区域中形成STI区域。 在该方法中，SOI器件区域中的STI区域形成为延伸穿过BOX层。

公开(公告)号：US20140377889A1

公开(公告)日：2014-12-25

申请号：US14304951

申请日：2014-06-15

Applicant: Renesas Electronics Corporation

Inventor： Hiraku Chakihara ,  Akihiro Nakae ,  Masaaki Shinohara ,  Yasushi Ishii

IPC: H01L21/66 ,  H01L21/033

CPC classification number: H01L22/12 ,  H01L23/544 ,  H01L27/11573 ,  H01L2223/5442 ,  H01L2223/54426 ,  H01L2223/5446 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor device manufacturing method which eliminates the possibility that when a film is processed several times, a thin photoresist film is made over a pattern used as an alignment mark, etc. and the pattern is exposed from the photoresist film and removed in a processing step, in order to improve the reliability of a semiconductor device. Patterns used as alignment marks, etc. are linear trenches as openings in a conductive film made over a semiconductor substrate, thereby preventing the photoresist film over the conductive film from flowing toward the openings in the conductive film.

Abstract translation: 一种半导体器件制造方法，其消除了当膜被加工数次时，在用作对准标记等的图案上形成薄的光致抗蚀剂膜，并且图案从光致抗蚀剂膜暴露并在处理步骤中去除 ，以提高半导体器件的可靠性。 用作对准标记等的图案是在半导体衬底上形成的导电膜中的开口的线性沟槽，从而防止导电膜上的光致抗蚀剂膜朝向导电膜中的开口流动。