公开(公告)号：US20160133548A1

公开(公告)日：2016-05-12

申请号：US14997509

申请日：2016-01-16

Applicant: Renesas Electronics Corporation

Inventor： Akito SHIMIZU ,  Kenji NISHIKAWA ,  Sadayuki MOROI ,  Tomoo lmura

IPC: H01L23/495 ,  H01L23/00 ,  H01L23/31

CPC classification number: H01L23/49503 ,  H01L21/56 ,  H01L21/561 ,  H01L21/563 ,  H01L23/3107 ,  H01L23/3114 ,  H01L23/3142 ,  H01L23/4952 ,  H01L23/49541 ,  H01L23/49548 ,  H01L23/49551 ,  H01L23/49568 ,  H01L23/49579 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/97 ,  H01L2224/05554 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/48465 ,  H01L2224/49109 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/78301 ,  H01L2224/97 ,  H01L2924/00012 ,  H01L2924/181 ,  H01L2924/18301 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A semiconductor device, includes a die pad that has a first main surface and a second main surface located on the opposite side of the first main surface; a lead arranged next to the die pad; a semiconductor chip that has a surface, a first electrode and a second electrode formed on the surface, and a reverse side located on the opposite side of the surface, and is mounted on a chip mounting area of the first main of the die pad; a first wire that electrically couples the first electrode of the semiconductor chip and the lead; a second wire that electrically couples the second electrode of the semiconductor chip and the die pad; and a sealed body that seals the semiconductor chip, the first wire, and the second wire.

Abstract translation: 一种半导体器件，包括具有位于所述第一主表面的相对侧的第一主表面和第二主表面的管芯焊盘; 引线布置在芯片垫的旁边; 具有表面的半导体芯片，形成在所述表面上的第一电极和第二电极以及位于所述表面的相反侧的反面，并且安装在所述管芯焊盘的第一主体的芯片安装区域上; 电连接半导体芯片的第一电极和引线的第一导线; 电连接半导体芯片的第二电极和芯片焊盘的第二导线; 以及密封半导体芯片，第一线和第二线的密封体。

公开(公告)号：US20170309547A1

公开(公告)日：2017-10-26

申请号：US15643903

申请日：2017-07-07

Applicant: Renesas Electronics Corporation

Inventor： Akito SHIMIZU ,  Kenji Nishikawa ,  Sadayuki Moroi ,  Tomoo Imura

IPC: H01L23/495 ,  H01L21/56 ,  H01L23/31 ,  H01L23/00

CPC classification number: H01L23/49503 ,  H01L21/56 ,  H01L21/561 ,  H01L21/563 ,  H01L23/3107 ,  H01L23/3114 ,  H01L23/3142 ,  H01L23/4952 ,  H01L23/49541 ,  H01L23/49548 ,  H01L23/49551 ,  H01L23/49568 ,  H01L23/49579 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/97 ,  H01L2224/05554 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/48465 ,  H01L2224/49109 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/78301 ,  H01L2224/97 ,  H01L2924/00012 ,  H01L2924/181 ,  H01L2924/18301 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A method for manufacturing a semiconductor device includes preparing a lead frame that includes a die pad including a first plane and a second plane located on an opposite side of the first plane, and a plurality of leads arranged next to the die pad, mounting a semiconductor chip including a surface, a plurality of electrodes formed over the surface, and a reverse side located on an opposite side of the surface over a chip mounting area of the first plane of the die pad, electrically coupling parts of the electrodes of the semiconductor chip and the leads through a plurality of first wires and electrically coupling other parts of the electrodes and the die pad through a second wire after the mounting the semiconductor chip, and after the electrically coupling, sealing the semiconductor chip, the first wires, and the second wire with a resin.

公开(公告)号：US20150194368A1

公开(公告)日：2015-07-09

申请号：US14659444

申请日：2015-03-16

Applicant: Renesas Electronics Corporation

Inventor： Akito SHIMIZU ,  Kenji Nishikawa ,  Sadayuki Moroi ,  Tomoo Imura

IPC: H01L23/495 ,  H01L21/56

CPC classification number: H01L23/49503 ,  H01L21/56 ,  H01L21/561 ,  H01L21/563 ,  H01L23/3107 ,  H01L23/3114 ,  H01L23/3142 ,  H01L23/4952 ,  H01L23/49541 ,  H01L23/49548 ,  H01L23/49551 ,  H01L23/49568 ,  H01L23/49579 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/97 ,  H01L2224/05554 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/48465 ,  H01L2224/49109 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/78301 ,  H01L2224/97 ,  H01L2924/00012 ,  H01L2924/181 ,  H01L2924/18301 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A method for manufacturing a semiconductor device, includes: (a) preparing a lead frame that includes a die pad having a first plane and a second plane located on the opposite side of the first plane, and a plurality of leads arranged next to the die pad; (b) mounting a semiconductor chip having a surface, a plurality of electrodes formed over the surface, and a reverse side located on the opposite side of the surface over a chip mounting area of the first plane of the die pad; (c) electrically coupling parts of the electrodes of the semiconductor chip and the leads through a plurality of first wires and electrically coupling the other parts of the electrodes and the die pad through a second wire.

Abstract translation: 一种制造半导体器件的方法，包括：（a）制备引线框架，该引线框架包括具有第一平面的管芯焊盘和位于第一平面的相对侧上的第二平面，以及设置在模具旁边的多个引线 垫; （b）安装具有表面的半导体芯片，形成在所述表面上的多个电极以及位于所述芯片安装区的所述第一平面的芯片安装区域的所述表面相反侧的反面; （c）通过多个第一布线电连接半导体芯片的电极和引线的部分，并通过第二导线电耦合电极和芯片焊盘的其它部分。