公开(公告)号：US20160065070A1

公开(公告)日：2016-03-03

申请号：US14823579

申请日：2015-08-11

Applicant: Renesas Electronics Corporation

Inventor： Koichiro NOGUCHI ,  Koichi NOSE ,  Yoshifumi IKENAGA ,  Yoichi YOSHIDA

IPC: H02M3/158

CPC classification number: H03K17/162 ,  H02M1/36 ,  H02M3/07 ,  H02M3/155 ,  H03K17/0814

Abstract: According to one embodiment, a semiconductor device includes: a first switch SWx which switches whether or not to supply a first power supply voltage Vx generated by accumulating a charge outputted from a power source 10, as a second power supply voltage VDD to a first circuit 13, and a second switch SW1 which switches whether or not to connect to the first circuit 13 a smoothing capacitor C1 which suppresses a fluctuation of the second power supply voltage VDD, and the first switch SWx is switched to an on state in response to that the first power supply voltage Vx has reached a sufficient voltage, and then the second switch SW1 is switched to the on state in response to that the second power supply voltage VDD has reached a sufficient voltage.

Abstract translation: 根据一个实施例，半导体器件包括：第一开关SWx，其切换是否将通过累积从电源10输出的电荷产生的第一电源电压Vx作为第二电源电压VDD提供给第一电路 13以及第二开关SW1，其切换是否连接到第一电路13的平滑电容器C1，其抑制第二电源电压VDD的波动，并且响应于该第一开关SWx将第一开关SWx切换到导通状态 第一电源电压Vx已经达到足够的电压，然后响应于第二电源电压VDD达到足够的电压而将第二开关SW1切换到导通状态。

公开(公告)号：US20150311706A1

公开(公告)日：2015-10-29

申请号：US14690381

申请日：2015-04-18

Applicant: Renesas Electronics Corporation

Inventor： Koichiro NOGUCHI ,  Koichi NOSE ,  Yoshifumi IKENAGA ,  Yoichi YOSHIDA

IPC: H02J1/04 ,  H02M7/06

CPC classification number: H02J50/20 ,  H02J1/102 ,  H02J7/025 ,  H02J17/00 ,  H02J50/40

Abstract: A power supply device according to an embodiment comprises a plurality of power sources 10 each including an antenna and an AC/DC conversion unit, a plurality of consolidating units 13—1 to 13—i, and a power supply unit 15. The consolidating units 13—1 to 13—i respectively include consolidating circuits 14—1 to 14—i that selectively consolidate a plurality of DC signals 21—1 to 21—n supplied by the plurality of power sources 10. The power supply unit 15 includes a consolidating circuit 16 that selectively consolidates the DC signals 21—1 to 21—i output from the plurality of consolidating units 13—1 to 13—i, and a voltage conversion circuit 17 that converts a DC signal 23 resulting from consolidation in the consolidating circuit 16, to a predetermined voltage.

Abstract translation: 根据实施例的电源装置包括多个电源10，每个电源10包括天线和AC / DC转换单元，多个合并单元13-1至13-i和电源单元15.合并单元 13-1至13-i分别包括选择性地合并由多个电源10提供的多个DC信号21-1至21-n的合并电路14-1至14-i。电源单元15包括合并 电路16，其选择性地合并从多个合并单元13-1至13-i输出的DC信号21-1至21-i;以及电压转换电路17，其将由巩固电路16中的合并产生的DC信号23转换 ，达到预定电压。

公开(公告)号：US20180083494A1

公开(公告)日：2018-03-22

申请号：US15826062

申请日：2017-11-29

Applicant: Renesas Electronics Corporation

Inventor： Koichiro NOGUCHI ,  Koichi NOSE ,  Yoshifumi IKENAGA ,  Yoichi YOSHIDA

IPC: H02J50/20 ,  H02J7/02 ,  H02J50/40 ,  H02J1/10

CPC classification number: H02J50/20 ,  H02J1/102 ,  H02J7/025 ,  H02J17/00 ,  H02J50/40

Abstract: A power supply device includes a plurality of power sources each including an antenna and an AC/DC conversion unit that converts an AC signal received by the antenna to a DC signal, a plurality of consolidating units each including a first consolidating circuit that selectively consolidates a plurality of DC signals supplied by the plurality of power sources, and a power supply unit that includes a second consolidating circuit that selectively consolidates DC signals output from the plurality of consolidating units, and a first voltage conversion circuit that converts a DC signal resulting from consolidation in the second consolidating circuit, to a predetermined voltage.

公开(公告)号：US20180323779A1

公开(公告)日：2018-11-08

申请号：US16024097

申请日：2018-06-29

Applicant: Renesas Electronics Corporation

Inventor： Koichiro NOGUCHI ,  Koichi NOSE ,  Yoshifumi IKENAGA ,  Yoichi YOSHIDA

IPC: H03K17/16

CPC classification number: H03K17/162 ,  H02M1/36 ,  H02M3/07 ,  H02M3/155 ,  H03K17/0814

Abstract: According to one embodiment, a semiconductor device includes: a first switch SWx which switches whether or not to supply a first power supply voltage Vx generated by accumulating a charge outputted from a power source 10, as a second power supply voltage VDD to a first circuit 13, and a second switch SW1 which switches whether or not to connect to the first circuit 13 a smoothing capacitor C1 which suppresses a fluctuation of the second power supply voltage VDD, and the first switch SWx is switched to an on state in response to that the first power supply voltage Vx has reached a sufficient voltage, and then the second switch SW1 is switched to the on state in response to that the second power supply voltage VDD has reached a sufficient voltage.

公开(公告)号：US20160364351A1

公开(公告)日：2016-12-15

申请号：US15098148

申请日：2016-04-13

Applicant: Renesas Electronics Corporation

Inventor： Koichiro NOGUCHI

IPC: G06F13/36 ,  G06F13/40

CPC classification number: G06F13/36 ,  G06F13/4068

Abstract: A semiconductor device is provided which can quickly detect a malfunction of high priority modules by frequently checking a coupling state between the high priority modules and a communication bus.According to an embodiment, a host controller includes a module control circuit that performs data communication with a plurality of externally-provided modules through a communication bus, a coupling state check circuit which is coupled to the communication bus and which checks the presence or absence of a response from the modules, and selected from the modules based on information of a check list, and a control circuit that selectively causes the module control circuit and the coupling state check circuit to operate.

Abstract translation: 根据实施例，主机控制器包括通过通信总线与多个外部提供的模块执行数据通信的模块控制电路，耦合状态检查电路，其耦合到通信总线，并检查是否存在 来自模块的响应，并且基于检查列表的信息从模块中选择，以及选择性地使模块控制电路和耦合状态检查电路工作的控制电路。

公开(公告)号：US20150180239A1

公开(公告)日：2015-06-25

申请号：US14523873

申请日：2014-10-25

Applicant: Renesas Electronics Corporation

Inventor： Koichiro NOGUCHI ,  Koichi Nose ,  Yoshifumi Ikenaga ,  Yoichi Yoshida

IPC: H02J3/38 ,  H02J17/00 ,  H02M7/04

CPC classification number: H02J50/20 ,  G05F1/67 ,  H02J17/00 ,  H02J50/40 ,  H02M7/217 ,  H02M2001/0003 ,  Y10T307/549

Abstract: There is a problem in the prior semiconductor devices that energy recovery efficiency is low. According to one embodiment of the present invention, a power supply circuit includes an alternating-current signal synthesis unit including a plurality of alternating-current coupling elements having primary sides to which respective input alternating-current signals are input and secondary sides connected in series with each other, and a control circuit that outputs an input selection signal specifying a combination of the input alternating-current signals to be synthesized. The control circuit generates the input selection signal so as to maximize the output alternating-current signal synthesized by the alternating-current synthesis signal unit.

Abstract translation: 在现有的半导体器件中存在能量回收效率低的问题。 根据本发明的一个实施例，电源电路包括交流信号合成单元，该交流信号合成单元包括多个交流电耦合元件，所述多个交流电耦合元件具有主输入侧的输入交流信号，二次侧与 以及控制电路，其输出指定要合成的输入交流信号的组合的输入选择信号。 控制电路产生输入选择信号，以使由交流合成信号单元合成的输出交流信号最大化。

公开(公告)号：US20170300329A1

公开(公告)日：2017-10-19

申请号：US15513544

申请日：2014-11-11

Applicant: Renesas Electronics Corporation

Inventor： Koichiro NOGUCHI ,  Osamu OKAZAKI ,  Shunichi KAERIYAMA ,  Koichi NOSE

IPC: G06F9/30 ,  G06F9/38

CPC classification number: G06F9/30076 ,  G06F9/30087 ,  G06F9/38 ,  G06F9/3836 ,  G06F9/52

Abstract: An instruction execution control system includes a plurality of instruction storage units configured to output instructions in an FIFO order to a plurality of instruction execution units configured to execute the instructions; an instruction control unit configured to assign each of a plurality of the sequentially input instructions to one of the instruction storage units, and an output control unit configured to control the output of the instructions from the instruction storage units. When the input instruction is a dummy instruction to be inserted between instructions that should be executed in an execution order, the instruction control unit distributes the input instruction to the plurality of instruction storage units. The output control unit stops the output of the instructions from the instruction storage unit, the instruction output therefrom has become the dummy instruction, to the instruction execution unit until instructions output from all instruction storage units become the dummy instructions.

公开(公告)号：US20160132040A1

公开(公告)日：2016-05-12

申请号：US14886025

申请日：2015-10-17

Applicant: Renesas Electronics Corporation

Inventor： Koichiro NOGUCHI ,  Osamu OKAZAKI ,  Shunichi KAERIYAMA

IPC: G05B19/4099

CPC classification number: G05B19/41805 ,  G05B2219/31066 ,  Y02P90/04

Abstract: A connection relation detecting system according to the present invention includes a plurality of modules which include a plurality of connection ports which can connect with another module, and an information processing device which, when the plurality of modules are connected with each other, is connected to one of the plurality of modules through the connection ports. Each of the plurality of modules includes a connection changing unit which connects the connection ports inside the module in response to a connection change request from the information processing device. The information processing device includes a connection detecting unit which, when the information processing device makes the connection change request to the module, detects a module newly recognized through the module as a module connected to the module to which the connection change request is made.

Abstract translation: 根据本发明的连接关系检测系统包括多个模块，其包括可与另一模块连接的多个连接端口，以及信息处理装置，当多个模块彼此连接时，连接到 多个模块之一通过连接端口。 多个模块中的每一个包括连接改变单元，该连接改变单元响应于来自信息处理设备的连接改变请求而连接模块内部的连接端口。 信息处理装置包括连接检测单元，当信息处理装置向模块进行连接改变请求时，将通过模块新认可的模块检测为连接到进行了连接改变请求的模块的模块。