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公开(公告)号：US10230275B2
公开(公告)日：2019-03-12
申请号：US15826062
申请日：2017-11-29
Applicant: Renesas Electronics Corporation
Inventor： Koichiro Noguchi , Koichi Nose , Yoshifumi Ikenaga , Yoichi Yoshida
Abstract: A power supply device includes a plurality of power sources each including an antenna and an AC/DC conversion unit that converts an AC signal received by the antenna to a DC signal, a plurality of consolidating units each including a first consolidating circuit that selectively consolidates a plurality of DC signals supplied by the plurality of power sources, and a power supply unit that includes a second consolidating circuit that selectively consolidates DC signals output from the plurality of consolidating units, and a first voltage conversion circuit that converts a DC signal resulting from consolidation in the second consolidating circuit, to a predetermined voltage.
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公开(公告)号：US10033372B2
公开(公告)日：2018-07-24
申请号：US14823579
申请日：2015-08-11
Applicant: Renesas Electronics Corporation
Inventor： Koichiro Noguchi , Koichi Nose , Yoshifumi Ikenaga , Yoichi Yoshida
Abstract: According to one embodiment, a semiconductor device includes: a first switch SWx which switches whether or not to supply a first power supply voltage Vx generated by accumulating a charge outputted from a power source 10, as a second power supply voltage VDD to a first circuit 13, and a second switch SW1 which switches whether or not to connect to the first circuit 13 a smoothing capacitor C1 which suppresses a fluctuation of the second power supply voltage VDD, and the first switch SWx is switched to an on state in response to that the first power supply voltage Vx has reached a sufficient voltage, and then the second switch SW1 is switched to the on state in response to that the second power supply voltage VDD has reached a sufficient voltage.
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公开(公告)号：US09843227B2
公开(公告)日：2017-12-12
申请号：US14690381
申请日：2015-04-18
Applicant: Renesas Electronics Corporation
Inventor： Koichiro Noguchi , Koichi Nose , Yoshifumi Ikenaga , Yoichi Yoshida
Abstract: A power supply device according to an embodiment comprises a plurality of power sources 10 each including an antenna and an AC/DC conversion unit, a plurality of consolidating units 13_1 to 13_i, and a power supply unit 15. The consolidating units 13_1 to 13_i respectively include consolidating circuits 14_1 to 14_i that selectively consolidate a plurality of DC signals 21_1 to 21_n supplied by the plurality of power sources 10. The power supply unit 15 includes a consolidating circuit 16 that selectively consolidates the DC signals 21_1 to 21_i output from the plurality of consolidating units 13_1 to 13_i, and a voltage conversion circuit 17 that converts a DC signal 23 resulting from consolidation in the consolidating circuit 16, to a predetermined voltage.
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4.发明授权公开(公告)号：US09184671B2
公开(公告)日：2015-11-10
申请号：US14534105
申请日：2014-11-05
Applicant: Renesas Electronics Corporation
Inventor： Yoichi Yoshida
CPC classification number: H02M7/217 , H01L27/0629 , H02M7/02 , H02M7/103 , H02M2001/0048 , H02M2007/2195 , Y02B70/1408 , Y02B70/1491 , Y10T307/25
Abstract: A semiconductor device according to one embodiment includes first and second transistor columns which each include a NMOS transistor and a PMOS transistor which are connected in series between a first power wire and a second power wire. Further, a gate of the PMOS transistor of one transistor column is connected to a wire which connects the NMOS transistor and the PMOS transistor of the other transistor column. Furthermore, an AC signal obtained by superimposing a signal on a bias voltage which is a voltage lower than that of the gate of the PMOS transistor included in the same transistor column is supplied to the gate of the NMOS transistor included in the transistor column.
Abstract translation: 根据一个实施例的半导体器件包括第一和第二晶体管列，每个晶体管列包括串联连接在第一电源线和第二电源线之间的NMOS晶体管和PMOS晶体管。 此外，一个晶体管列的PMOS晶体管的栅极连接到连接另一个晶体管列的NMOS晶体管和PMOS晶体管的导线。 此外，通过将包含在同一晶体管列中的PMOS晶体管的栅极的电压比作为低电压的偏置电压叠加的AC信号提供给晶体管列的NMOS晶体管的栅极。
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公开(公告)号：US20160295726A1
公开(公告)日：2016-10-06
申请号：US15005407
申请日：2016-01-25
Applicant: Renesas Electronics Corporation
Inventor： Yoichi Yoshida
CPC classification number: B25J19/0029 , B25J17/00
Abstract: In a robot apparatus including a plurality of electronic components, it is possible to arbitrarily determine a coupling direction between the electronic components.An electronic component includes a chassis having an aperture and a connector which is contained in the chassis and can be electrically coupled to the outside through the aperture. The connector has a structure that can rotate in the chassis around an axis in a normal direction of the aperture.
Abstract translation: 电子部件包括具有开口的底架和连接器，该底座容纳在底盘中并且可以通过该孔电耦合到外部。 连接器具有可以在机架中围绕孔径法线方向的轴线旋转的结构。
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Patent Agency Ranking
公开(公告)号：US20150180239A1
公开(公告)日：2015-06-25
申请号：US14523873
申请日：2014-10-25
Applicant: Renesas Electronics Corporation
Inventor： Koichiro NOGUCHI , Koichi Nose , Yoshifumi Ikenaga , Yoichi Yoshida
CPC classification number: H02J50/20 , G05F1/67 , H02J17/00 , H02J50/40 , H02M7/217 , H02M2001/0003 , Y10T307/549
Abstract: There is a problem in the prior semiconductor devices that energy recovery efficiency is low. According to one embodiment of the present invention, a power supply circuit includes an alternating-current signal synthesis unit including a plurality of alternating-current coupling elements having primary sides to which respective input alternating-current signals are input and secondary sides connected in series with each other, and a control circuit that outputs an input selection signal specifying a combination of the input alternating-current signals to be synthesized. The control circuit generates the input selection signal so as to maximize the output alternating-current signal synthesized by the alternating-current synthesis signal unit.
Abstract translation: 在现有的半导体器件中存在能量回收效率低的问题。 根据本发明的一个实施例，电源电路包括交流信号合成单元，该交流信号合成单元包括多个交流电耦合元件，所述多个交流电耦合元件具有主输入侧的输入交流信号，二次侧与 以及控制电路，其输出指定要合成的输入交流信号的组合的输入选择信号。 控制电路产生输入选择信号，以使由交流合成信号单元合成的输出交流信号最大化。
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公开(公告)号：US10102177B2
公开(公告)日：2018-10-16
申请号：US14919961
申请日：2015-10-22
Applicant: Renesas Electronics Corporation
Inventor： Yoichi Yoshida
IPC: G06F13/42 , G06F13/40 , G06F13/362
Abstract: To provide a serial communication system that can flexibly or easily change a system configuration. For example, when coupled to first and second serial buses, a motor module transmits a first signal to the second serial bus. Subsequently, the motor module transmits a first command containing a candidate address to the first serial bus; meanwhile, the motor module searches for an address where an acknowledgement is not received in response to the first command. The motor module transmits the search result address to the second serial bus. A control unit at the reception of the first signal changes to a sleep state that stops communications with the first serial bus and receives an address as a search result from the second serial bus.
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公开(公告)号：US09906079B2
公开(公告)日：2018-02-27
申请号：US14523873
申请日：2014-10-25
Applicant: Renesas Electronics Corporation
Inventor： Koichiro Noguchi , Koichi Nose , Yoshifumi Ikenaga , Yoichi Yoshida
CPC classification number: H02J50/20 , G05F1/67 , H02J17/00 , H02J50/40 , H02M7/217 , H02M2001/0003 , Y10T307/549
Abstract: There is a problem in the prior semiconductor devices that energy recovery efficiency is low. According to one embodiment of the present invention, a power supply circuit includes an alternating-current signal synthesis unit including a plurality of alternating-current coupling elements having primary sides to which respective input alternating-current signals are input and secondary sides connected in series with each other, and a control circuit that outputs an input selection signal specifying a combination of the input alternating-current signals to be synthesized. The control circuit generates the input selection signal so as to maximize the output alternating-current signal synthesized by the alternating-current synthesis signal unit.
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公开(公告)号：US10305468B2
公开(公告)日：2019-05-28
申请号：US16024097
申请日：2018-06-29
Applicant: Renesas Electronics Corporation
Inventor： Koichiro Noguchi , Koichi Nose , Yoshifumi Ikenaga , Yoichi Yoshida
Abstract: According to one embodiment, a semiconductor device includes: a first switch SWx which switches whether or not to supply a first power supply voltage Vx generated by accumulating a charge outputted from a power source 10, as a second power supply voltage VDD to a first circuit 13, and a second switch SW1 which switches whether or not to connect to the first circuit 13 a smoothing capacitor C1 which suppresses a fluctuation of the second power supply voltage VDD, and the first switch SWx is switched to an on state in response to that the first power supply voltage Vx has reached a sufficient voltage, and then the second switch SW1 is switched to the on state in response to that the second power supply voltage VDD has reached a sufficient voltage.
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10.发明授权公开(公告)号：US09379638B2
公开(公告)日：2016-06-28
申请号：US14874240
申请日：2015-10-02
Applicant: Renesas Electronics Corporation
Inventor： Yoichi Yoshida
CPC classification number: H02M7/217 , H01L27/0629 , H02M7/02 , H02M7/103 , H02M2001/0048 , H02M2007/2195 , Y02B70/1408 , Y02B70/1491 , Y10T307/25
Abstract: A semiconductor device comprising a rectifier circuit, wherein the rectifier circuit includes first and second input wires to which AC signals whose phases are inverted from each other are transmitted; a first transistor of a first conductive type which has a first power wire connected with a first transistor terminal and a gate connected with the first input wire; a second transistor of the first conductive type which has the first power wire connected with a first transistor terminal, and a gate connected with the second input wire; a third transistor of a second conductive type which has a second power wire connected with a first transistor terminal, a second transistor terminal connected with a second transistor terminal of the first transistor and a gate connected with the first input capacitor; and a fourth transistor of the second conductive type which has the second power wire connected with a first transistor terminal.
Abstract translation: 一种包括整流电路的半导体器件，其中整流器电路包括第一和第二输入引线，相互相互反相的AC信号被发送到该第一和第二输入引线; 第一导电类型的第一晶体管，其具有与第一晶体管端子连接的第一电源线和与第一输入线连接的栅极; 第一导电类型的第二晶体管，其具有与第一晶体管端子连接的第一电源线，以及与第二输入线连接的栅极; 具有与第一晶体管端子连接的第二电源线的第二导电类型的第三晶体管，与第一晶体管的第二晶体管端子连接的第二晶体管端子和与第一输入电容器连接的栅极; 以及具有与第一晶体管端子连接的第二电源线的第二导电类型的第四晶体管。
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