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公开(公告)号:US09208828B2
公开(公告)日:2015-12-08
申请号:US14269173
申请日:2014-05-04
Applicant: RENESAS ELECTRONICS CORPORATION
Inventor: Satoru Hanzawa , Fumihiko Nitta , Nozomu Matsuzaki , Toshihiro Tanaka
CPC classification number: G11C5/06 , G11C13/0004 , G11C13/003 , G11C13/0069 , G11C2213/74 , G11C2213/79 , H01L27/2436 , H01L27/2463 , H01L45/06 , H01L45/1233 , H01L45/141 , H01L45/144
Abstract: In a semiconductor device including a memory cell array formed of memory cells using a storage element by a variable resistor and a select transistor, a buffer cell is arranged between a sense amplifier and the memory cell array and between a word driver and the memory cell array. The resistive storage element in the memory cell is connected to a bit-line via a contact formed above the resistive storage element. Meanwhile, in the buffer cell, the contact is not formed above the resistive storage element, and a state of being covered with an insulator is kept upon processing the contact in the memory cell. By such a processing method, exposure and sublimation of a chalcogenide film used in the resistive storage element can be avoided.
Abstract translation: 在包括由可变电阻器使用存储元件的存储器单元和选择晶体管形成的存储单元阵列的半导体器件中,缓冲单元布置在读出放大器和存储单元阵列之间以及字驱动器和存储单元阵列之间 。 存储单元中的电阻存储元件通过形成在电阻存储元件上方的触点连接到位线。 同时,在缓冲单元中,电阻性存储元件之上不形成接触,并且在处理存储单元中的接触时保持被绝缘体覆盖的状态。 通过这种处理方法,可以避免在电阻存储元件中使用的硫族化物膜的曝光和升华。
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公开(公告)号:US08737116B2
公开(公告)日:2014-05-27
申请号:US13927073
申请日:2013-06-25
Applicant: Renesas Electronics Corporation
Inventor: Satoru Hanzawa , Fumihiko Nitta , Nozomu Matsuzaki , Toshihiro Tanaka
CPC classification number: G11C5/06 , G11C13/0004 , G11C13/003 , G11C13/0069 , G11C2213/74 , G11C2213/79 , H01L27/2436 , H01L27/2463 , H01L45/06 , H01L45/1233 , H01L45/141 , H01L45/144
Abstract: In a semiconductor device including a memory cell array formed of memory cells using a storage element by a variable resistor and a select transistor, a buffer cell is arranged between a sense amplifier and the memory cell array and between a word driver and the memory cell array. The resistive storage element in the memory cell is connected to a bit-line via a contact formed above the resistive storage element. Meanwhile, in the buffer cell, the contact is not formed above the resistive storage element, and a state of being covered with an insulator is kept upon processing the contact in the memory cell. By such a processing method, exposure and sublimation of a chalcogenide film used in the resistive storage element can be avoided.
Abstract translation: 在包括由可变电阻器使用存储元件的存储器单元和选择晶体管形成的存储单元阵列的半导体器件中,缓冲单元布置在读出放大器和存储单元阵列之间以及字驱动器和存储单元阵列之间 。 存储单元中的电阻存储元件通过形成在电阻存储元件上方的触点连接到位线。 同时,在缓冲单元中,电阻性存储元件之上不形成接触,并且在处理存储单元中的接触时保持被绝缘体覆盖的状态。 通过这种处理方法,可以避免在电阻存储元件中使用的硫族化物膜的曝光和升华。
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