Marker for alignment of non-transparent gate layer, method for manufacturing such a marker, and use of such a marker in a lithographic apparatus
    1.
    发明授权
    Marker for alignment of non-transparent gate layer, method for manufacturing such a marker, and use of such a marker in a lithographic apparatus 失效
    用于非透明栅极层对准的标记,用于制造这种标记的方法,以及在光刻设备中使用这种标记

    公开(公告)号:US07271073B2

    公开(公告)日:2007-09-18

    申请号:US10879707

    申请日:2004-06-30

    IPC分类号: H01L21/66 H01L21/67

    摘要: A method for manufacturing a marker structure including line elements and trench elements arranged in a repetitive order includes filling the trench elements with silicon dioxide and leveling the marker structure. A sacrificial oxide layer is grown on the semiconductor surface, and a first subset of the line elements is exposed to an ion implantation beam including a dopant species to dope and change an etching rate of the first subset. The substrate is annealed to activate the dopant species, and the semiconductor surface is etched to remove the sacrificial oxide layer and to level the first subset to a first level and to create a topology such that the first subset has a first level differing from a second level of a surface portion of the marker structure different from the first subset.

    摘要翻译: 用于制造包括以重复排列的线元件和沟槽元件的标记结构的方法包括用二氧化硅填充沟槽元件并调平标记结构。 在半导体表面上生长牺牲氧化物层,并且将线元件的第一子集暴露于包括掺杂剂物质的离子注入束以掺杂并改变第一子集的蚀刻速率。 将衬底退火以激活掺杂剂物质,并且蚀刻半导体表面以去除牺牲氧化物层,并将第一子集级别化为第一级并且创建拓扑,使得第一子集具有与第二子集不同的第一级 不同于第一子集的标记结构的表面部分的水平。

    Marker for alignment of non-transparent gate layer, method for manufacturing such a marker, and use of such a marker in a lithographic apparatus
    2.
    发明授权
    Marker for alignment of non-transparent gate layer, method for manufacturing such a marker, and use of such a marker in a lithographic apparatus 失效
    用于非透明栅极层对准的标记,用于制造这种标记的方法,以及在光刻设备中使用这种标记

    公开(公告)号:US07453161B2

    公开(公告)日:2008-11-18

    申请号:US11889517

    申请日:2007-08-14

    IPC分类号: H01L23/544

    摘要: A method for manufacturing a marker structure including line elements and trench elements arranged in a repetitive order includes filling the trench elements with silicon dioxide and leveling the marker structure. A sacrificial oxide layer is grown on the semiconductor surface, and a first subset of the line elements is exposed to an ion implantation beam including a dopant species to dope and change an etching rate of the first subset. The substrate is annealed to activate the dopant species, and the semiconductor surface is etched to remove the sacrificial oxide layer and to level the first subset to a first level and to create a topology such that the first subset has a first level differing from a second level of a surface portion of the marker structure different from the first subset.

    摘要翻译: 用于制造包括以重复排列的线元件和沟槽元件的标记结构的方法包括用二氧化硅填充沟槽元件并调平标记结构。 在半导体表面上生长牺牲氧化物层,并且将线元件的第一子集暴露于包括掺杂剂物质的离子注入束以掺杂并改变第一子集的蚀刻速率。 将衬底退火以激活掺杂剂物质,并且蚀刻半导体表面以去除牺牲氧化物层,并将第一子集级别化为第一级并且创建拓扑,使得第一子集具有与第二子集不同的第一级 不同于第一子集的标记结构的表面部分的水平。