摘要:
A power supply and a method of operating the same. In one embodiment, the power supply includes: (1) a DC-DC converter having an isolation transformer that conveys an alternating voltage of about a first frequency between a primary winding and at least one secondary winding thereof and (2) a four-quadrant inverter, coupled to one of the at least secondary winding, that converts a portion of the alternating voltage into a waveform having about a second frequency that is less than the first frequency, including: (2a) a bi-directional switch, coupled between an input and an output of the four-quadrant inverter and (2b) a controller, coupled to the switch, that activates the switch to couple the input to the output during a portion of a switching cycle of the alternating voltage to change voltages in the waveform.
摘要:
A switching boost regulator, including auxiliary circuitry having an auxiliary switch and inductor connected to operate the regulator in a zero-voltage transition mode, achieves substantial efficiency improvement by limiting losses in the auxiliary circuitry dedicated to achieving zero-voltage transition operation. Loss reduction circuitry included with the auxiliary circuitry cooperatively operates to limit turn-on and conduction losses and to suppress ringing of the components of the auxiliary circuit.
摘要:
For use with a power factor correction circuit, a current mode controller, a method of operating current mode control to achieve power factor correction thereof and a power supply incorporating the controller or the method. In one embodiment, the controller includes: (1) a modulator, coupled to a switch in the power factor correction circuit, that senses an electrical characteristic and a current passing through the power factor correction circuit and provides, in response thereto, a control signal to the switch and (2) a compensation circuit, coupled to an input of the power factor correction circuit, that provides a compensation signal to the modulator that is a function of a rectified line voltage provided to the input of the power factor correction circuit. The compensation signal causes the modulator to modify the control signal to reduce a total harmonic distortion (THD) of the power factor correction circuit.
摘要:
An asymmetrical half-bridge converter, a method of operating the same and a power supply that incorporates either the converter or the method. In one embodiment, the converter includes: (1) a power transformer that receives asymmetrical AC input power into a primary winding thereof via an input capacitor, the asymmetrical AC input power inducing a DC bias current in a secondary winding of the power transformer and (2) first and second serially-coupled output inductors coupled across the secondary winding and having parasitic resistances associated therewith that are independently selectable to attenuate the DC bias circuit in the secondary winding.
摘要:
An estimating circuit for application in estimating or deriving the value V.sub.rms.sup.2 or V.sub.peak.sup.2, of a line voltage V.sub.AC provides fast response time and a substantially ripple free value for these signals by the utilization of a controlled harmonic oscillator whose output precisely tracks the input voltage waveform. Two out of phase (by .pi./2) sine wave signals are derived from the input sine wave and these two out of phase signals are squared and summed to derive or estimate the desired square of the sine waveform signal at a fast response time while substantially excluding ripple of the estimated out of phase sine waves. An estimating circuit, described herein, comprises two integrator circuits series connected into a substantially closed loop. The output of the second integrator circuit is fed back to the input of the first integrator circuit. The output of each individual integrator circuit is a voltage sine wave separated in phase from the output of the other integrator by .pi./2 and in synchronism with the input substantially sine wave voltage V.sub.AC. The output of each of the integrator circuits is squared in an associated squaring circuit. Each output of one of the two squaring circuits is summed with the output of the other squaring circuit to produce the desired value of V.sub.peak.sup.2 or V.sub.rms.sup.2.
摘要:
A power factor control system for a rectifier is operative through the generation of estimators of control input parameters (a peak squared input AC voltage E.sub.m.sup.2 and load power) and by the use of these substantially ripple free signals controls a boost, buck, buck-boost, SEPIC or other related type converter at the input to the rectifier. The generation of these parameters allows the derivation of a programmed current i.sub.p used to control the wave form of the actual input current. The control procedure is based on a quarter cycle averaged power basis. The input power is derived from the rms values of the input voltage and current. Given the output power and its deviations in power due to load changes, the programmed current i.sub.p is determined by deriving an input conductance of the rectifier and combining it with the input voltage.
摘要:
A converter for enhancing power factor utilizes a line sense winding magnetically coupled to sense a voltage across a line inductor in the input of a high power factor power converter. This winding in the illustrative embodiment is typically a single turn. This winding provides a measurement of the derivative (with respect to time) of the line current, and a specially designed integrator connected to the winding provides the estimate of the line current. An integrator is operative to accurately estimate the current by using known properties of this current to prevent mismeasurement due to reconstructing the "constant of integration" and any small biases in the integrator which normally cause errors.
摘要:
A split boost converter is disclosed herein, suitable for both single phase and three phase AC input applications. It provides two equal but unparallelable output voltages stored on two separate independent output capacitors. The implementation supports two modes of operation in which two power switches are operated simultaneously or alternately. Each mode maintains the advantage of a reduced boost inductor size. In the first mode the charging of the capacitors in parallel circuits and their discharge in a series connection substantially reduces ripple current in the inductor permitting the user of a smaller inductor. In the second mode the capacitors are charged and discharged in differing time intervals achieving a similar result. The circuit is operable with input voltages which must exceed the voltages of its two output capacitors.
摘要:
A dc-dc converter system comprises a quasi-regulated bus converter and plural regulation stages that regulate the output of the bus converter. The bus converter has at least one controlled rectifier with a parallel uncontrolled rectifier. A control circuit controls the controlled rectifier to cause a normally non-regulated mode of operation through a portion of an operating range of source voltage and a regulated output during another portion. The bus converter may be an isolation stage having primary and secondary transformer winding circuits. For the non-regulated output, each primary winding has a voltage waveform with a fixed duty cycle. The fixed duty cycle causes substantially uninterrupted flow of power during non-regulated operation. Inductors at the bus converter input and in a filter at the output of the bus converter may saturate during non-regulated operation.
摘要:
For use with a power converter having first and second power switches coupled between a converter input and a primary winding of a transformer to impress an input voltage across the primary winding, a voltage clamp circuit for, and method of, resetting the transformer and a power converter employing the clamp circuit or the method. In one embodiment, the clamp circuit includes: (1) first and second reset windings coupled between the first and second power switches, (2) first and second energy storage devices coupled between the primary winding and the first and second reset windings, respectively, and (3) first and second switching circuits, coupled to the first reset winding and the second reset winding, respectively, that provide an electrical path from the primary winding to the converter input through the first and second reset windings, respectively, when the first and second power switches are not conducting.