CIRCUIT AND METHOD FOR CARRYING OUT A VECTOR OPERATION

    公开(公告)号:US20240265986A1

    公开(公告)日:2024-08-08

    申请号:US18430945

    申请日:2024-02-02

    申请人: Robert Bosch GmbH

    IPC分类号: G11C27/00

    CPC分类号: G11C27/005

    摘要: A circuit for carrying out a vector operation. The circuit includes: memory cells, connected to a column line, each having an input terminal and a semiconductor switching element, the gate terminal of which is connected to the input terminal, and the drain or the source terminal being connected to the column line, wherein when a sufficiently high gate voltage is at the gate terminal, the memory cell is activated so that an electrical cell current is conducted out of or into the column line at suitable voltages; an input voltage circuit connected to the input terminals; a detection circuit connected to the column line and having an analog-to-digital converter which determines a digital value corresponding to the intensity of a measurement current flowing into or out of the column line, the detection circuit being configured to detect the digital value determined by the analog-to-digital converter, and reduce the measurement current.

    METHOD FOR MAPPING AN INPUT VECTOR TO AN OUTPUT VECTOR BY MEANS OF A MATRIX CIRCUIT

    公开(公告)号:US20240193228A1

    公开(公告)日:2024-06-13

    申请号:US18532826

    申请日:2023-12-07

    IPC分类号: G06F17/16 G11C11/22

    CPC分类号: G06F17/16 G11C11/223

    摘要: The disclosure relates to a method for mapping an input vector to an output vector by means of a matrix circuit which has memory cells arranged in a matrix in a plurality of rows and a plurality of columns and first, second and third lines, each memory cell having an adjustable memory state, is connected to the first line (22) of the corresponding row, is connected to the second and third lines of the corresponding column and is set up to generate an electrical current (I1, I2, I3) depending on the memory state and voltages applied to the first, second and third lines, is connected to the second and third lines of the corresponding column and is arranged to conduct an electric current (I1, I2, I3) into the third line (26) as a function of the memory state and voltages applied to the first, second and third lines, each memory cell having a semiconductor switching element (28) with a control terminal which is connected to the second line (24) of the corresponding column; wherein input voltages (U1, U2, U3) corresponding to components of the input vector are applied (110) to the first lines; wherein for each column: a ramp voltage (V1, V2, V3) is applied (120) to the second line assigned to the column, the level of which is increased with time (130); a total current is detected at the third line assigned to the column and a time period elapsed since a start time of the level increase of the corresponding ramp voltage is determined (150) until the magnitude of the total current reaches a certain current magnitude threshold (Ig) (140); and a component of the output vector corresponding to the column is determined (170) based on the elapsed time period (t1, t2, t3).

    Circuit system and method for energizing and discharging a coil

    公开(公告)号:US11367550B2

    公开(公告)日:2022-06-21

    申请号:US16464003

    申请日:2017-12-08

    申请人: Robert Bosch GmbH

    IPC分类号: H01F7/06 F16K31/06

    摘要: A circuit includes a rectifier, e.g., including four diodes; a semiconductor switch; a coil that is chargeable, is dischargeable, and has (a) a first terminal connected to a first output terminal of the rectifier and (b) a second terminal connected via the semiconductor switch to a second output terminal of the rectifier; a first resistor via which a control terminal of the semiconductor switch is connected to the first output terminal of the rectifier; a second resistor connected between the second output terminal of the rectifier and the control terminal of the semiconductor switch; and a discharge unit connected between the second terminal of the coil and the control terminal of the semiconductor switch. The charging and discharging is implemented by, respectively, connecting both of, and disconnecting one or both of, first and second input terminals of the rectifier to/from the voltage source.

    METHOD FOR PROCESSING INPUT VARIABLES BY MEANS OF A PROCESSING DEVICE HAVING AT LEAST ONE TRANSISTOR, DEVICE FOR EXECUTING THE METHOD, COMPUTING DEVICE, AND USE

    公开(公告)号:US20240364329A1

    公开(公告)日:2024-10-31

    申请号:US18640713

    申请日:2024-04-19

    申请人: Robert Bosch GmbH

    IPC分类号: H03K17/687

    CPC分类号: H03K17/687

    摘要: A method for processing input variables using a processing device having at least a first transistor, for example a field-effect transistor. The method includes: providing the first transistor and a first memristive circuit device which characterizes a first input variable associated with the first transistor, wherein a charging current of a capacitor associated with a control electrode of the first transistor can be influenced by means of the first memristive element; applying to the control electrode of the first transistor a first control signal which characterizes a second input variable associated with the first transistor and which has at least periodically a non-constant amplitude; ascertaining a first output variable on the basis of a first variable characterizing a time curve of a current through a load path of the first transistor.

    METHOD FOR PROCESSING INPUT VARIABLES BY MEANS OF A PROCESSING DEVICE HAVING AT LEAST ONE TRANSISTOR, DEVICE FOR EXECUTING THE METHOD, COMPUTING DEVICE AND USE

    公开(公告)号:US20240313779A1

    公开(公告)日:2024-09-19

    申请号:US18600281

    申请日:2024-03-08

    申请人: Robert Bosch GmbH

    IPC分类号: H03K19/0948 G11C13/00

    CPC分类号: H03K19/0948 G11C13/0002

    摘要: A method for processing input variables by means of a processing device having least a first transistor. The method including: providing the first transistor and a first memristive element, which characterizes a first input variable associated with the first transistor, wherein a charging current of a capacitance associated with a control electrode of the first transistor can be influenced using the first memristive element; applying to the control electrode of the first transistor a first output variable which characterizes a second input variable associated with the first transistor; ascertaining a first output variable which characterizes at least one product of the first input variable and of the second input variable, based on a first variable characterizing a time profile of a current through a load path of the first transistor.

    APPARATUS COMPRISING A COMPARATOR DEVICE, AND OPERATING METHOD THEREFOR

    公开(公告)号:US20240120930A1

    公开(公告)日:2024-04-11

    申请号:US18491168

    申请日:2023-10-20

    申请人: Robert Bosch GmbH

    IPC分类号: H03M1/06

    CPC分类号: H03M1/0607

    摘要: An apparatus. The apparatus includes at least a first comparator device, which is designed to compare a first input current with a first reference current and, based on the comparison, to output a first output current to a second comparator device, wherein the first output current corresponds to a difference of the first reference current and the first input current if the first input current is smaller than the first reference current, and wherein the first output current corresponds to a difference of the first input current and the first reference current if the first input current is greater than or equal to the first reference current.

    Image sensor element for outputting an image signal, and method for manufacturing an image sensor element for outputting an image signal

    公开(公告)号:US11089243B2

    公开(公告)日:2021-08-10

    申请号:US16579038

    申请日:2019-09-23

    申请人: Robert Bosch GmbH

    发明人: Tobias Kirchner

    摘要: An image sensor element for outputting an image signal. The image sensor element initially includes a first photoelement, the first photoelement being situated on a spatial area of a pixel on a semiconductor substrate. The image sensor element also includes a second photoelement that is doped and/or provided with a color filter in such a way that a spectral sensitivity of the first photoelement differs from a spectral sensitivity of the second photoelement. Lastly, the image sensor element includes an evaluation electronics system that is situated in the area of the pixel on the semiconductor substrate, the evaluation electronics system being situated in the area of the pixel in which the first photoelement is also implemented. The evaluation electronics system is designed to process a photoelement signal of the first photoelement and a photoelement signal of the second photoelement to form the image signal.