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1.发明授权Method and apparatus for integrated circuit design model performance evaluation using basic block vector clustering and fly-by vector clustering 有权集成电路设计模型性能评估的方法和装置，采用基本的块矢量聚类和飞行矢量聚类公开(公告)号：US07904870B2
公开(公告)日：2011-03-08
申请号：US12112035
申请日：2008-04-30
申请人： Robert H. Bell, Jr. , Wen-Tzer Thomas Chen , Venkat Rajeev Indukuru , Pattabi Michael Seshadri , Madhavi Gopal Valluri
发明人： Robert H. Bell, Jr. , Wen-Tzer Thomas Chen , Venkat Rajeev Indukuru , Pattabi Michael Seshadri , Madhavi Gopal Valluri
IPC分类号： G06F9/455
CPC分类号： G06F17/5022 , G01R31/318357 , G06F11/3428 , G06F11/3457 , G06F11/3664
摘要： A test system or simulator includes an enhanced IC test application sampling software program that executes test application software on a semiconductor die IC design model. The enhanced test application sampling software may include trace, simulation point, CPI error, clustering, instruction budgeting, and other programs. The enhanced test application sampling software generates basic block vectors (BBVs) and fly-by vectors (FBVs) from instruction trace analysis of test application software workloads. The enhanced test application sampling software utilizes the microarchitecture dependent information to generate the FBVs to select representative instruction intervals from the test application software. The enhanced test application sampling software generates a reduced representative test application software program from the BBV and FBV data utilizing a global instruction budgeting analysis method. Designers use the test system with enhanced test application sampling software to evaluate IC design models by using the representative test application software program.
摘要翻译： 测试系统或模拟器包括在半导体芯片IC设计模型上执行测试应用软件的增强型IC测试应用采样软件程序。 增强的测试应用程序采样软件可能包括跟踪，模拟点，CPI错误，聚类，指令预算和其他程序。 增强的测试应用采样软件从测试应用软件工作负载的指令跟踪分析中生成基本块向量（BBV）和飞越向量（FBV）。 增强的测试应用采样软件利用微架构依赖信息生成FBV，以从测试应用软件中选择代表性指令间隔。 增强的测试应用采样软件利用全球指令预算分析方法，从BBV和FBV数据生成代表性测试应用软件程序。 设计人员使用带有增强型测试应用程序采样软件的测试系统，通过使用代表性的测试应用软件程序来评估IC设计模型。
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2.发明申请TWO-LEVEL REPRESENTATIVE WORKLOAD PHASE DETECTION METHOD, APPARATUS, AND COMPUTER USABLE PROGRAM CODE 有权两级代表性工作负载相位检测方法，装置和计算机可用程序代码公开(公告)号：US20090182994A1
公开(公告)日：2009-07-16
申请号：US11972678
申请日：2008-01-11
申请人： Robert H. Bell, JR. , Wen-Tzer Thomas Chen , Venkat Rajeev Indukuru , Pattabi Michael Seshadri , Madhavi Gopal Valluri
发明人： Robert H. Bell, JR. , Wen-Tzer Thomas Chen , Venkat Rajeev Indukuru , Pattabi Michael Seshadri , Madhavi Gopal Valluri
IPC分类号： G06F9/30
CPC分类号： G06F11/3414 , G06F11/3476 , G06F2201/885
摘要： A method, apparatus, and computer-usable program code in a computer system for identifying a subset of a workload, which includes a total set of dynamic instructions, to use as a trace. Processor unit hardware executes the entire workload in real-time using a particular dataset. The processor unit hardware includes at least one microprocessor and at least one cache. The real-time execution of the workload is monitored to obtain information about how the processor unit hardware executes the workload when the workload is executed using the particular dataset to form actual performance information. Multiple different subsets of the workload are generated. The execution of each one of the subsets by the processor unit hardware is compared with the actual performance information. A result of the comparison is used to select one of the plurality of different subsets that roost closely represents the execution of the entire workload using the particular dataset to use as a trace.
摘要翻译： 一种计算机系统中的方法，装置和计算机可用的程序代码，用于识别工作负载的子集，其包括一组动态指令，用作跟踪。 处理器单元硬件使用特定数据集实时执行整个工作负载。 处理器单元硬件包括至少一个微处理器和至少一个高速缓存。 监视工作负载的实时执行，以获取有关当使用特定数据集执行工作负载以形成实际性能信息时处理器单元硬件如何执行工作负载的信息。 生成多个不同的工作负载子集。 将处理器单元硬件的每个子集的执行与实际的性能信息进行比较。 比较的结果被用于选择多个不同的子集中的一个，这些子集中使用特定的数据集作为跟踪来密切地表示整个工作负荷的执行。
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公开(公告)号：US08245084B2
公开(公告)日：2012-08-14
申请号：US11972678
申请日：2008-01-11
申请人： Robert H. Bell, Jr. , Wen-Tzer Thomas Chen , Venkat Rajeev Indukuru , Pattabi Michael Seshadri , Madhavi Gopal Valluri
发明人： Robert H. Bell, Jr. , Wen-Tzer Thomas Chen , Venkat Rajeev Indukuru , Pattabi Michael Seshadri , Madhavi Gopal Valluri
IPC分类号： G06F11/00
CPC分类号： G06F11/3414 , G06F11/3476 , G06F2201/885
摘要： A subset of a workload, which includes a total set of dynamic instructions, is identified to use as a trace. Processor unit hardware executes the entire workload in real-time using a particular dataset. The processor unit hardware includes at least one microprocessor and at least one cache. The real-time execution of the workload is monitored to obtain information about how the processor unit hardware executes the workload when the workload is executed using the particular dataset to form actual performance information. Multiple different subsets of the workload are generated. The execution of each one of the subsets by the processor unit hardware is compared with the actual performance information. A result of the comparison is used to select one of the plurality of different subsets that most closely represents the execution of the entire workload using the particular dataset to use as a trace.
摘要翻译： 工作负载的一个子集（其中包含一整套动态指令）被识别为跟踪。 处理器单元硬件使用特定数据集实时执行整个工作负载。 处理器单元硬件包括至少一个微处理器和至少一个高速缓存。 监视工作负载的实时执行，以获取有关当使用特定数据集执行工作负载以形成实际性能信息时处理器单元硬件如何执行工作负载的信息。 生成多个不同的工作负载子集。 将处理器单元硬件的每个子集的执行与实际的性能信息进行比较。 使用比较的结果来选择使用特定数据集作为跟踪最接近地表示整个工作负荷的执行的多个不同子集中的一个。
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4.发明授权公开(公告)号：US08832416B2
公开(公告)日：2014-09-09
申请号：US11753005
申请日：2007-05-24
申请人： Wen-Tzer Thomas Chen , Venkat Rajeev Indukuru , Alexander Erik Mericas , Mysore Sathyanarayana Srinivas
发明人： Wen-Tzer Thomas Chen , Venkat Rajeev Indukuru , Alexander Erik Mericas , Mysore Sathyanarayana Srinivas
IPC分类号： G06F11/34
CPC分类号： G06F11/3409 , G06F11/3471 , G06F11/3476 , G06F2201/86 , G06F2201/865 , G06F2201/88 , G06F2201/885
摘要： An information handling system includes a processor that executes multiple instructions or instruction threads within a software application program. The information handling system includes operating system software that manages processor system hardware and software in a multi-tasking environment. In one embodiment, the operating system manages instruction completion stall analysis software to determine the cause or causes of instruction stalls. In another embodiment, the stall analysis software cooperates with the operating system software to store instruction completion stall event data on a per instruction basis while the application program executes. The operating system software may cooperate with the stall analysis software to store instruction completion stall data in memory for later manipulation by system users or other software.
摘要翻译： 信息处理系统包括在软件应用程序内执行多个指令或指令线程的处理器。 信息处理系统包括在多任务环境中管理处理器系统硬件和软件的操作系统软件。 在一个实施例中，操作系统管理指令完成失速分析软件以确定指令停顿的原因或原因。 在另一个实施例中，失速分析软件与操作系统软件配合，以在应用程序执行时以每个指令为基础存储指令完成失速事件数据。 操作系统软件可以与失速分析软件配合以将指令完成失速数据存储在存储器中以供系统用户或其他软件稍后操作。
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5.发明申请公开(公告)号：US20080294881A1
公开(公告)日：2008-11-27
申请号：US11753005
申请日：2007-05-24
申请人： Wen-Tzer Thomas Chen , Venkat Rajeev Indukuru , Alexander Erik Mericas , Mysore Sathyanarayana Srinivas
发明人： Wen-Tzer Thomas Chen , Venkat Rajeev Indukuru , Alexander Erik Mericas , Mysore Sathyanarayana Srinivas
IPC分类号： G06F11/34
CPC分类号： G06F11/3409 , G06F11/3471 , G06F11/3476 , G06F2201/86 , G06F2201/865 , G06F2201/88 , G06F2201/885
摘要： An information handling system includes a processor that executes multiple instructions or instruction threads within a software application program. The information handling system includes operating system software that manages processor system hardware and software in a multi-tasking environment. In one embodiment, the operating system manages instruction completion stall analysis software to determine the cause or causes of instruction stalls. In another embodiment, the stall analysis software cooperates with the operating system software to store instruction completion stall event data on a per instruction basis while the application program executes. The operating system software may cooperate with the stall analysis software to store instruction completion stall data in memory for later manipulation by system users or other software.
摘要翻译： 信息处理系统包括在软件应用程序内执行多个指令或指令线程的处理器。 信息处理系统包括在多任务环境中管理处理器系统硬件和软件的操作系统软件。 在一个实施例中，操作系统管理指令完成失速分析软件以确定指令停顿的原因或原因。 在另一个实施例中，失速分析软件与操作系统软件配合，以在应用程序执行时以每个指令为基础存储指令完成失速事件数据。 操作系统软件可以与失速分析软件配合以将指令完成失速数据存储在存储器中以供系统用户或其他软件稍后操作。
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6.发明授权Operating system aware branch predictor using a dynamically reconfigurable branch history table 有权使用动态可重配置分支历史表的操作系统感知分支预测器公开(公告)号：US08745362B2
公开(公告)日：2014-06-03
申请号：US12823288
申请日：2010-06-25
IPC分类号： G06F9/00
CPC分类号： G06F9/5011 , G06F9/3848 , G06F2209/507
摘要： A processor resource manager assigns a branch history resource to a first execution mode. The branch history resource is utilized for predicting a branch direction of a branch instruction. Next, the resource manager logs a number of branch mispredictions that occur while the processor executes a second execution mode. The resource manager, in turn, reassigns the branch history resource to the second execution mode based upon the number of branch mispredictions.
摘要翻译： 处理器资源管理器将分支历史资源分配给第一执行模式。 分支历史资源用于预测分支指令的分支方向。 接下来，资源管理器记录在处理器执行第二执行模式时发生的多个分支错误预测。 资源管理器又根据分支错误预测的数量将分支历史资源重新分配到第二执行模式。
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7.发明申请Method And Apparatus For Integrated Circuit Design Model Performance Evaluation Using Basic Block Vector Clustering And Fly-By Vector Clustering 有权使用基本块矢量聚类和飞行矢量聚类的集成电路设计模型性能评估的方法和装置公开(公告)号：US20090276191A1
公开(公告)日：2009-11-05
申请号：US12112035
申请日：2008-04-30
申请人： Robert H. Bell, JR. , Wen-Tzer Thomas Chen , Venkat R. Indukuru , Pattabi M. Seshadri , Madhavi G. Valluri
发明人： Robert H. Bell, JR. , Wen-Tzer Thomas Chen , Venkat R. Indukuru , Pattabi M. Seshadri , Madhavi G. Valluri
IPC分类号： G06F17/50
CPC分类号： G06F17/5022 , G01R31/318357 , G06F11/3428 , G06F11/3457 , G06F11/3664
摘要： A test system or simulator includes an enhanced IC test application sampling software program that executes test application software on a semiconductor die IC design model. The enhanced test application sampling software may include trace, simulation point, CPI error, clustering, instruction budgeting, and other programs. The enhanced test application sampling software generates basic block vectors (BBVs) and fly-by vectors (FBVs) from instruction trace analysis of test application software workloads. The enhanced test application sampling software utilizes the microarchitecture dependent information to generate the FBVs to select representative instruction intervals from the test application software. The enhanced test application sampling software generates a reduced representative test application software program from the BBV and FBV data utilizing a global instruction budgeting analysis method. Designers use the test system with enhanced test application sampling software to evaluate IC design models by using the representative test application software program.
摘要翻译： 测试系统或模拟器包括在半导体芯片IC设计模型上执行测试应用软件的增强型IC测试应用采样软件程序。 增强的测试应用程序采样软件可能包括跟踪，模拟点，CPI错误，聚类，指令预算和其他程序。 增强的测试应用采样软件从测试应用软件工作负载的指令跟踪分析中生成基本块向量（BBV）和飞越向量（FBV）。 增强的测试应用采样软件利用微架构依赖信息生成FBV，以从测试应用软件中选择代表性指令间隔。 增强的测试应用采样软件利用全球指令预算分析方法，从BBV和FBV数据生成代表性测试应用软件程序。 设计人员使用带有增强型测试应用程序采样软件的测试系统，通过使用代表性的测试应用软件程序来评估IC设计模型。
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8.发明申请OPERATING SYSTEM AWARE BRANCH PREDICTOR USING A DYNAMICALLY RECONFIGURABLE BRANCH HISTORY TABLE 有权使用动态可重新分支历史表的操作系统AWARE分支预测器公开(公告)号：US20110320793A1
公开(公告)日：2011-12-29
申请号：US12823288
申请日：2010-06-25
IPC分类号： G06F9/38
CPC分类号： G06F9/5011 , G06F9/3848 , G06F2209/507
摘要： A processor resource manager assigns a branch history resource to a first execution mode. The branch history resource is utilized for predicting a branch direction of a branch instruction. Next, the resource manager logs a number of branch mispredictions that occur while the processor executes a second execution mode. The resource manager, in turn, reassigns the branch history resource to the second execution mode based upon the number of branch mispredictions.
摘要翻译： 处理器资源管理器将分支历史资源分配给第一执行模式。 分支历史资源用于预测分支指令的分支方向。 接下来，资源管理器记录在处理器执行第二执行模式时发生的多个分支错误预测。 资源管理器又根据分支错误预测的数量将分支历史资源重新分配到第二执行模式。
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9.发明授权Augmenting of automated clustering-based trace sampling methods by user-directed phase detection 有权通过用户导向的相位检测来增强基于自动聚类的跟踪采样方法公开(公告)号：US08000953B2
公开(公告)日：2011-08-16
申请号：US11842337
申请日：2007-08-21
IPC分类号： G06F9/45
CPC分类号： G06F9/455 , G06F11/3636 , G06F11/3664
摘要： Computer implemented method, system, and computer usable program code for simulating processor operation in a data processing system. An instruction trace is generated, wherein the instruction trace includes markers specified by a user for identifying interval boundaries for at least one interval of the instruction trace. The instruction trace is divided into a plurality of intervals in consideration of the markers, and the plurality of intervals are formed into a plurality of interval clusters, wherein each interval cluster represents one phase of execution of the instruction trace. At least one interval from each of the plurality of interval clusters is selected as a trace sample to provide a plurality of trace samples, wherein each selected interval is of at least a minimum size, a simulation is performed using the plurality of trace samples, and a result of the simulation is provided to the user.
摘要翻译： 用于在数据处理系统中模拟处理器操作的计算机实现的方法，系统和计算机可用程序代码。 生成指令轨迹，其中指令轨迹包括由用户指定的用于识别指令轨迹的至少一个间隔的间隔边界的标记。 考虑到标记，指令轨迹被分成多个间隔，并且多个间隔被形成为多个间隔簇，其中每个间隔簇表示指令轨迹的执行的一个阶段。 选择来自多个间隔群集中的每一个的至少一个间隔作为跟踪样本以提供多个跟踪样本，其中每个选择的间隔至少为最小尺寸，使用多个迹线样本进行模拟，以及 向用户提供模拟的结果。
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10.发明申请Augmenting of Automated Clustering-Based Trace Sampling Methods by User-Directed Phase Detection 有权通过用户定向相位检测来增强基于自动聚类的跟踪采样方法公开(公告)号：US20090055153A1
公开(公告)日：2009-02-26
申请号：US11842337
申请日：2007-08-21
IPC分类号： G06F9/455
CPC分类号： G06F9/455 , G06F11/3636 , G06F11/3664
摘要： Computer implemented method, system, and computer usable program code for simulating processor operation in a data processing system. An instruction trace is generated, wherein the instruction trace includes markers specified by a user for identifying interval boundaries for at least one interval of the instruction trace. The instruction trace is divided into a plurality of intervals in consideration of the markers, and the plurality of intervals are formed into a plurality of interval clusters, wherein each interval cluster represents one phase of execution of the instruction trace. At least one interval from each of the plurality of interval clusters is selected as a trace sample to provide a plurality of trace samples, wherein each selected interval is of at least a minimum size, a simulation is performed using the plurality of trace samples, and a result of the simulation is provided to the user.
摘要翻译： 用于在数据处理系统中模拟处理器操作的计算机实现的方法，系统和计算机可用程序代码。 生成指令轨迹，其中指令轨迹包括由用户指定的用于识别指令轨迹的至少一个间隔的间隔边界的标记。 考虑到标记，指令轨迹被分成多个间隔，并且多个间隔被形成为多个间隔簇，其中每个间隔簇表示指令轨迹的执行的一个阶段。 选择来自多个间隔群集中的每一个的至少一个间隔作为跟踪样本以提供多个跟踪样本，其中每个选择的间隔至少为最小尺寸，使用多个迹线样本进行模拟，以及 向用户提供模拟的结果。
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