Plants with enhanced ability to produce starch and methods for obtaining them

    公开(公告)号:US06867350B2

    公开(公告)日:2005-03-15

    申请号:US09859822

    申请日:2001-05-17

    CPC分类号: C12N15/8245

    摘要: The subject invention concerns materials and methods for enhancing starch production in plants. Starch production is enhanced, relative to levels observed in wildtype or control plants, by reduction of the plant 14-3-3 protein(s) which subsequently results in increased accumulation of starch in the plant. In one embodiment, the 14-3-3 protein expression is reduced using polynucleotides that are antisense to the 14-3-3 gene sequences expressed in the plant. In another embodiment, the 14-3-3 protein expression is reduced by “knockout” of a 14-3-3 gene or gene sequences. The subject invention also pertains to transformed and transgenic plants that have polynucleotides that are antisense to the 14-3-3 gene sequences expressed in the plant, wherein the transformed and transgenic plants exhibit enhanced starch production. The subject invention also pertains to “knockout” plants in which the normal functional 14-3-3 gene in the plant is deleted or replaced with a non-functional form of the gene. The subject invention also concerns the “antisense” polynucleotides of the invention that when introduced into a plant cell can function to effectively reduce expression of the 14-3-3 proteins in a plant.

    Silicon probe for millimeter-wave and terahertz measurement and characterization

    公开(公告)号:US11333682B2

    公开(公告)日:2022-05-17

    申请号:US16817747

    申请日:2020-03-13

    IPC分类号: G01R1/067

    摘要: A probe includes a first rod having a first axis and a second rod having a second axis. A first end of the first rod is connected to a first end of the second rod to form an angle that maintains a “total internal reflection” effect for waves propagating through the probe. A second end of the second rod includes a prong facilitating attachment of the probe to a housing block. The first axis and the second axis define a plane. A second end of the first rod includes a tapered face formed perpendicular to the plane. The tapered face is sufficiently flat to make planar contact with a portion of a component under study. A support is formed in the plane and connected to the second rod. A second end of the support includes a connector to facilitate attachment of the probe to the housing block.

    System and method for TDD-FDD duplexing in a radio architecture

    公开(公告)号:US09929768B2

    公开(公告)日:2018-03-27

    申请号:US14605620

    申请日:2015-01-26

    申请人: Lin Li Ke Wu

    发明人: Lin Li Ke Wu

    摘要: A reconfigurable TDD-FDD multiplexer operates in a TDD mode and a FDD mode. The TDD-FDD multiplexer includes an interdigital quadruplexer in series with a one-pole three-throw RF switch. The interdigital quadruplexer includes of two V-band filters, connectable to a transmitter and a receiver, respectively, for TDD mode duplexing, and two E-band filters, connectable to a transmitter and a receiver, respectively, for FDD mode duplexing. The E-band filters include an E-band transmitting filter that passes an E-band transmitting frequency band, and an E-band receiving filter that passes for an E-band receiving frequency band offset from the E-band transmitting frequency band. Switching between the V-band receiving filter and V-band transmitting filter enables TDD duplexing functionality at V-band frequencies. Switching to the two E-band filters enables FDD duplexing functionality at E-band frequencies.

    WAVEGUIDE FILTER
    7.
    发明申请
    WAVEGUIDE FILTER 失效
    波形滤波器

    公开(公告)号:US20090243762A1

    公开(公告)日:2009-10-01

    申请号:US12412503

    申请日:2009-03-27

    IPC分类号: H01P1/20

    CPC分类号: H01P1/2088

    摘要: A waveguide bandpass filter for use in microwave and millimeter-wave satellite communications equipment is presented. The filter is based on a substrate integrated waveguide (SIW) having several cascaded oversized SIW cavities. The filter is implemented in a printed circuit board (PCB) or a ceramic substrate using arrays of standard metalized via holes to define the perimeters of the SIW cavities. Transmission lines of a microstrip line, a stripline or coplanar waveguide are used as input and output feeds. The transmission lines have coupling slots for improved stopband performance. The filter can be easily integrated with planar circuits for microwave and millimeter wave applications.

    摘要翻译: 提出了一种用于微波和毫米波卫星通信设备的波导带通滤波器。 滤波器基于具有几个级联的超大SIW腔的衬底集成波导(SIW)。 该滤波器在印刷电路板(PCB)或陶瓷基板中实现,其使用标准金属化通孔阵列来限定SIW腔的周长。 使用微带线,带状线或共面波导的传输线作为输入和输出馈送。 传输线具有用于改善阻带性能的耦合槽。 滤波器可以方便地与微波和毫米波应用的平面电路集成。

    Fail-safe circuit with low input impedance using active-transistor differential-line terminators
    8.
    发明授权
    Fail-safe circuit with low input impedance using active-transistor differential-line terminators 有权
    使用有源晶体管差分线路终端器的低输入阻抗的故障安全电路

    公开(公告)号:US06525559B1

    公开(公告)日:2003-02-25

    申请号:US10063416

    申请日:2002-04-22

    申请人: Ke Wu David Kwong

    发明人: Ke Wu David Kwong

    IPC分类号: H03K19003

    CPC分类号: H04L25/08 H03K19/007

    摘要: A fail-safe circuit for a pair of differential input lines detects when one or both lines are open. Each line has a pull-up of a switched p-channel transistor in series with a resistor or another p-channel transistor that has its effective resistance controlled by a gate bias. The gate of the switched p-channel transistor is driven to ground when power is applied to the gate of a grounding n-channel transistor. When power is off, a p-channel connecting transistor charges the gate node from the differential input line when a positive voltage is applied to the input line, such as during a leakage test. Charging the gate node prevents the switched p-channel transistor from turning on, blocking a leakage current path through the pull-up. An N-well bias circuit can be added, which connects the N-well under p-channel transistors to power or the gate node or the input line.

    摘要翻译: 一对差分输入线的故障安全电路检测一条或两条线是否断开。 每行具有与电阻器或具有由栅极偏置控制的其有效电阻的另一p沟道晶体管串联的开关p沟道晶体管的上拉电阻。 当电源施加到接地n沟道晶体管的栅极时,开关p沟道晶体管的栅极被驱动到地。 当电源关闭时,例如在泄漏测试期间,当正电压施加到输入线时,p沟道连接晶体管将来自差分输入线的栅极节点充电。 对栅极节点进行充电可防止开关的p沟道晶体管导通,阻止通过上拉的漏电流路径。 可以添加N阱偏置电路,其将p沟道晶体管下的N阱连接到电源或栅极节点或输入线。

    Cancellation of injected charge in a bus switch
    9.
    发明授权
    Cancellation of injected charge in a bus switch 失效
    在总线开关中取消注入的电荷

    公开(公告)号:US6075400A

    公开(公告)日:2000-06-13

    申请号:US133743

    申请日:1998-08-13

    申请人: Ke Wu Arnold Chow

    发明人: Ke Wu Arnold Chow

    IPC分类号: H03K17/16 H03K17/30

    CPC分类号: H03K17/162

    摘要: A bus switch has control of the timing of turning on and off the main p-channel and n-channel transistors that connect two network nodes. A pair of cross-coupled NAND gates form a set-reset S-R latch that controls the gates of the main p-channel and n-channel transistors. The S-R latch controls the timing so that the main p-channel and n-channel transistors switch at about the same time, canceling much of each other's injected charge. Since the main p-channel is larger due to the lower hole mobility, an excess of injected charge from the p-channel transistor remains. This excess charge is cancelled by opposite charge injected by compensating transistors. The compensating transistors are also p-channel devices, but are driven with a logical inverse of the gate of the main p-channel transistor. This produces a charge with opposite polarity to the excess charge from the main p-channel transistor. The sources and drains of the compensating transistors are connected together so that they transistors act as capacitors. A connecting p-channel transistor is added in parallel with the main p-channel transistor. The connecting p-channel transistors is turned on early, before the main p-channel transistor, to increase the capacitance by connecting the two network nodes. The increased capacitance decreases the voltage spike caused by a fixed amount of injected charge.

    摘要翻译: 总线开关控制连接两个网络节点的主p沟道和n沟道晶体管的导通和关断定时。 一对交叉耦合NAND门形成一个设置复位S-R锁存器,其控制主p沟道和n沟道晶体管的栅极。 S-R锁存器控制定时,使得主p沟道和n沟道晶体管大约在同一时间转换,消除了彼此的注入电荷的大部分。 由于主要p沟道由于较低的空穴迁移率而较大,所以剩余来自p沟道晶体管的注入电荷过剩。 该过剩电荷由补偿晶体管注入的相反电荷消除。 补偿晶体管也是p沟道器件,但是由主p沟道晶体管的栅极的逻辑反相驱动。 这产生与来自主p沟道晶体管的过量电荷相反极性的电荷。 补偿晶体管的源极和漏极连接在一起,使得它们的晶体管用作电容器。 连接的p沟道晶体管与主p沟道晶体管并联。 连接的p沟道晶体管在主p沟道晶体管之前提前开启,通过连接两个网络节点来增加电容。 增加的电容降低由固定量的注入电荷引起的电压尖峰。