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    Method and system for managing a NAND flash memory by paging segments of a logical to physical address map to a non-volatile memory
    1.
    发明授权
    Method and system for managing a NAND flash memory by paging segments of a logical to physical address map to a non-volatile memory 有权
    用于通过将逻辑到物理地址映射的片段寻址到非易失性存储器来管理NAND闪存的方法和系统

    公开(公告)号：US08612666B2

    公开(公告)日：2013-12-17

    申请号：US12495573

    申请日：2009-06-30

    申请人： Robert J. Royer, Jr. ,  Robert Faber ,  Brent Chartrand

    发明人： Robert J. Royer, Jr. ,  Robert Faber ,  Brent Chartrand

    IPC分类号： G06F12/00 ,  G06F12/10

    CPC分类号： G06F12/0246 ,  G06F2212/7201 ,  G06F2212/7207

    摘要： A method and system to facilitate paging of one or more segments of a logical-to-physical (LTP) address mapping structure, such as a table, to a non-volatile memory, such as a NAND flash memory. The LTP address mapping structure is part of an indirection system map associated with the non-volatile memory. By allowing one or more segments of the LTP address mapping structure to be paged to the non-volatile memory, the amount of volatile memory required to store the LTP address mapping structure is reduced while maintaining the benefits of the LTP address mapping structure. One or more segments of the logical to physical address mapping structure may be cached in volatile memory, and a size of each segment may be the same as or a multiple of a page size of the NAND flash memory. A lookup or segment table may be provided to indicate a location of each segment and may be optimized for sequential physical addresses.

    摘要翻译： 一种有助于将诸如表的逻辑到物理（LTP）地址映射结构的一个或多个段的寻呼的方法和系统提供给诸如NAND闪存之类的非易失性存储器。 LTP地址映射结构是与非易失性存储器相关联的间接系统映射的一部分。 通过允许LTP地址映射结构的一个或多个段被分页到非易失性存储器，减少存储LTP地址映射结构所需的易失性存储器的量，同时保持LTP地址映射结构的优点。 逻辑到物理地址映射结构的一个或多个段可以被缓存在易失性存储器中，并且每个段的大小可以与NAND闪速存储器的页面大小相同或倍数。 可以提供查找或分段表以指示每个分段的位置并且可以针对顺序物理地址进行优化。

    METHOD AND SYSTEM FOR MANAGING A NAND FLASH MEMORY
    2.
    发明申请
    METHOD AND SYSTEM FOR MANAGING A NAND FLASH MEMORY 有权
    用于管理NAND闪存的方法和系统

    公开(公告)号：US20100332730A1

    公开(公告)日：2010-12-30

    申请号：US12495573

    申请日：2009-06-30

    申请人： Robert J. Royer, JR. ,  Robert Faber ,  Brent Chartrand

    发明人： Robert J. Royer, JR. ,  Robert Faber ,  Brent Chartrand

    IPC分类号： G06F12/00 ,  G06F12/02

    CPC分类号： G06F12/0246 ,  G06F2212/7201 ,  G06F2212/7207

    摘要： A method and system to facilitate paging of one or more segments of a logical-to-physical (LTP) address mapping structure to a non-volatile memory. The LTP address mapping structure is part of an indirection system map associated with the non-volatile memory in one embodiment of the invention. By allowing one or more segments of the LTP address mapping structure to be paged to the non-volatile memory, the amount of volatile memory required to store the LTP address mapping structure is reduced while maintaining the benefits of the LTP address mapping structure in one embodiment of the invention.

    摘要翻译： 一种有助于将逻辑到物理（LTP）地址映射结构的一个或多个段分页到非易失性存储器的方法和系统。 在本发明的一个实施例中，LTP地址映射结构是与非易失性存储器相关联的间接系统映射的一部分。 通过允许LTP地址映射结构的一个或多个段被分页到非易失性存储器，在一个实施例中保持LTP地址映射结构的优点的同时，减少存储LTP地址映射结构所需的易失性存储器的量 的本发明。

    Technique to write to a non-volatile memory
    3.
    发明申请
    Technique to write to a non-volatile memory 有权
    写入非易失性存储器的技术

    公开(公告)号：US20070005928A1

    公开(公告)日：2007-01-04

    申请号：US11172608

    申请日：2005-06-30

    申请人： Sanjeev Trika ,  Robert Faber ,  Rick Coulson ,  Jeanna Matthews

    发明人： Sanjeev Trika ,  Robert Faber ,  Rick Coulson ,  Jeanna Matthews

    IPC分类号： G06F12/00

    CPC分类号： G06F12/0246 ,  G06F2212/7209

    摘要： A technique includes performing a plurality of write operations to store data in different physical memory locations. Each of the physical memory locations are associated with a logical address that is shared in common among the physical addresses. The technique includes storing sequence information in the physical memory locations to indicate which one of the write operations occurred last.

    摘要翻译： 一种技术包括执行多个写入操作以将数据存储在不同的物理存储器位置中。 每个物理存储器位置与物理地址中共同共享的逻辑地址相关联。 该技术包括将序列信息存储在物理存储器位置中以指示写入操作中哪一个最后发生。

    GENERATION OF FAR MEMORY ACCESS SIGNALS BASED ON USAGE STATISTIC TRACKING
    6.
    发明申请
    GENERATION OF FAR MEMORY ACCESS SIGNALS BASED ON USAGE STATISTIC TRACKING 有权
    基于使用统计跟踪的FAR存储器访问信号的生成

    公开(公告)号：US20130290597A1

    公开(公告)日：2013-10-31

    申请号：US13996525

    申请日：2011-09-30

    申请人： Robert Faber

    发明人： Robert Faber

    IPC分类号： G06F12/02

    CPC分类号： G06F12/0238 ,  G06F12/0868 ,  G06F13/1668 ,  G06F2212/202 ,  Y02D10/13 ,  Y02D10/14

    摘要： A method is described that entails receiving an address for a read or write transaction to a non volatile system memory device. The method further involves determining a usage statistic of the memory device for a set of addresses of which the address is a member. The method further involves determining a characteristic of a signal to be applied to the memory device for the read or write transaction based on the usage statistic. The method further involves generating a signal having the characteristic to perform the read or write transaction.

    摘要翻译： 描述了需要接收用于读取或写入事务的地址给非易失性系统存储器设备的方法。 该方法还包括确定该地址是其成员的一组地址的存储器设备的使用统计量。 该方法还包括基于使用统计量确定要用于读取或写入事务的存储器件的信号的特征。 该方法还涉及生成具有执行读或写事务的特征的信号。

    Recovering from a non-volatile memory failure
    8.
    发明申请
    Recovering from a non-volatile memory failure 有权
    从非易失性存储器故障中恢复

    公开(公告)号：US20070168698A1

    公开(公告)日：2007-07-19

    申请号：US11266119

    申请日：2005-11-03

    申请人： Richard Coulson ,  Sanjeev Trika ,  Robert Faber

    发明人： Richard Coulson ,  Sanjeev Trika ,  Robert Faber

    IPC分类号： G06F11/00

    CPC分类号： G11C16/349 ,  G06F12/0246

    摘要： Write operations store data in different physical memory locations. Each of the physical memory locations are associated with a logical address that is shared in common among the physical addresses. Sequence information stored in the physical memory location indicates which one of the write operations occurred last. The available erased memory location can be split into a list of erased memory locations available to be used and a list of erased memory locations not available to be used. Then, on a failure, only the list of erased memory locations available to be used needs to be analyzed to reconstruct the consumption states of memory locations.

    摘要翻译： 写操作将数据存储在不同的物理内存位置。 每个物理存储器位置与物理地址中共同共享的逻辑地址相关联。 存储在物理存储器位置的序列信息指示最后发生哪个写入操作。 可用的擦除的存储器位置可以被拆分为可用于被使用的擦除的存储器位置的列表和不可用的擦除的存储器位置的列表。 然后，在故障时，仅需要分析可用于被使用的擦除的存储器位置的列表，以重建存储器位置的消耗状态。

    Distributed and packed metadata structure for disk cache
    10.
    发明申请
    Distributed and packed metadata structure for disk cache 有权
    磁盘缓存的分布式和打包的元数据结构

    公开(公告)号：US20070061511A1

    公开(公告)日：2007-03-15

    申请号：US11229128

    申请日：2005-09-15

    申请人： Robert Faber

    发明人： Robert Faber

    IPC分类号： G06F13/00

    CPC分类号： G06F9/4418 ,  Y10S707/99931 ,  Y10S707/99943

    摘要： An apparatus and method to reduce the initialization time of a system is disclosed. In one embodiment, upon a cache line update, metadata associated with the cache line is stored in a distributed format in non-volatile memory with its associated cache line. Upon indication of an expected shut down, metadata is copied from volatile memory and stored in non-volatile memory in a packed format. In the packed format, multiple metadata associated with multiple cache lines are stored together in, for example, a single memory block. Thus, upon system power up, if the system was shut down in an expected manner, metadata may be restored in volatile memory from the metadata stored in the packed format, with a significantly reduced boot time over restoring metadata from the metadata stored in the distributed format.

    摘要翻译： 公开了减少系统的初始化时间的装置和方法。 在一个实施例中，在高速缓存行更新时，与高速缓存行相关联的元数据以分布式格式存储在具有其相关联的高速缓存行的非易失性存储器中。 在指示预期的关闭时，元数据从易失性存储器复制并以压缩格式存储在非易失性存储器中。 在打包格式中，与多个高速缓存行相关联的多个元数据一起存储在例如单个存储器块中。 因此，在系统上电时，如果系统以预期的方式关闭，则可以从以打包格式存储的元数据中的易失性存储器中恢复元数据，其中显着减少了从存储在分布式数据库中的元数据恢复元数据的引导时间 格式。