Method of fabricating a laminate circuit structure
    3.
    发明授权
    Method of fabricating a laminate circuit structure 失效
    制造层叠电路结构的方法

    公开(公告)号:US06834426B1

    公开(公告)日:2004-12-28

    申请号:US09625135

    申请日:2000-07-25

    IPC分类号: H05K320

    摘要: A method for fabricating a laminate circuit structure is provided. The method comprises: providing at least two modularized circuitized voltage plane subassemblies wherein each of the subassemblies comprise at least two signal planes having an external and internal surface disposed about an internal voltage plane; providing a dielectric material between the signal and voltage planes; and providing dielectric on each external surface of each signal plane; and providing a non-cured or partially cured curable dielectric composition between the subassemblies wherein the dielectric composition comprises, dielectric material that is of the same material as the dielectric material used in said subassemblies, aligning the subassemblies, and then laminating to cause bonding of the subassemblies.

    摘要翻译: 提供一种制造叠层电路结构的方法。 该方法包括:提供至少两个模块化的电路化电压平面子组件,其中每个子组件包括至少两个具有围绕内部电压平面设置的外部和内部表面的信号平面; 在信号和电压平面之间提供介电材料; 并在每个信号平面的每个外表面上提供电介质; 并且在所述子组件之间提供未固化或部分固化的可固化电介质组合物,其中所述电介质组合物包括与所述子组件中使用的介电材料具有相同材料的介电材料,对准所述子组件,然后层压以引起 子组件