-
1.发明申请公开(公告)号：US20120192139A1
公开(公告)日：2012-07-26
申请号：US13426835
申请日：2012-03-22
IPC分类号： G06F17/50
CPC分类号： H01L25/16 , H01L23/147 , H01L23/49827 , H01L23/50 , H01L23/552 , H01L23/645 , H01L24/13 , H01L24/16 , H01L2223/6661 , H01L2223/6672 , H01L2224/13147 , H01L2224/16225 , H01L2224/16227 , H01L2224/16265 , H01L2924/14 , H01L2924/1433 , H01L2924/157 , H01L2924/19011 , H01L2924/19042 , H01L2924/19103 , H01L2924/19107 , H01L2224/48091 , H01L2924/00014
摘要： Integrated structures having high performance CMOS active devices mounted on passive devices are provided. The structure includes an integrated passive device chip having a plurality of through wafer vias, mounted to a ground plane. The structure further includes at least one CMOS device mounted on the integrated passive device chip using flip chip technology and being grounded to the ground plane through the through wafer vias of the integrated passive device chip.
摘要翻译： 提供了具有安装在无源器件上的高性能CMOS有源器件的集成结构。 该结构包括集成无源器件芯片，其具有安装到接地平面的多个通过晶片通孔。 该结构还包括使用倒装芯片技术安装在集成无源器件芯片上的至少一个CMOS器件，并通过集成无源器件芯片的贯穿晶片通孔接地到接地层。
-
公开(公告)号：US20130334701A1
公开(公告)日：2013-12-19
申请号：US13527131
申请日：2012-06-19
申请人： Jeffrey P. GAMBINO , Jessica A. LEVY , Cameron E. LUCE , Daniel S. VANSLETTE , Bucknell C. WEBB
发明人： Jeffrey P. GAMBINO , Jessica A. LEVY , Cameron E. LUCE , Daniel S. VANSLETTE , Bucknell C. WEBB
IPC分类号： H01L23/48 , H01L21/768
CPC分类号： H01L23/481 , H01L21/76898 , H01L2924/0002 , H01L2924/00
摘要： A through silicon via with sidewall roughness and methods of manufacturing the same are disclosed. The method includes forming a via in a substrate and roughening a sidewall of the via by depositing material within the via. The method further includes removing a backside of the substrate to form a through via with a roughened sidewall structure.
摘要翻译： 公开了一种具有侧壁粗糙度的贯通硅通孔及其制造方法。 该方法包括在基板中形成通孔，并通过在通孔内沉积材料来粗糙化通孔的侧壁。 该方法还包括去除衬底的背面以形成具有粗糙化侧壁结构的通孔。
-
搜索结果
2 条记录 (耗时 0.016 秒)
