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    Pilot signal strength control for a low earth orbiting satellite communications system
    1.
    发明授权
    Pilot signal strength control for a low earth orbiting satellite communications system 失效
    低地球轨道卫星通信系统的导频信号强度控制

    公开(公告)号：US5835847A

    公开(公告)日：1998-11-10

    申请号：US627830

    申请日：1996-04-02

    申请人： Robert P. Gilmore ,  James H. Thompson

    发明人： Robert P. Gilmore ,  James H. Thompson

    IPC分类号： H04B7/005 ,  H04B7/15 ,  H04B7/185 ,  H04B7/00

    CPC分类号： H04B7/18543

    摘要： A system and method for controlling the strength of a shared resource signal transmitted by the satellite transponder in a satellite communications system. The satellite communications system includes a gateway for transmitting communications signals including a shared resource signal, a satellite transponder for relaying the signals to at least one subscriber unit (for example, a phone), and at least one subscriber unit for receiving the signals. The method includes the steps of receiving the shared resource signal, at each subscriber unit, via the satellite transponder; measuring, at each subscriber unit, a signal strength for the received shared resource signal; sending the signal strengths to the gateway; and adjusting the power of the shared resource signal transmitted by the satellite transponder based on the signal strengths.

    摘要翻译： 一种用于控制由卫星通信系统中的卫星转发器发送的共享资源信号的强度的系统和方法。 卫星通信系统包括用于发送包括共享资源信号的通信信号的网关，用于将信号中继到至少一个用户单元（例如，电话）的卫星转发器以及用于接收信号的至少一个用户单元。 该方法包括以下步骤：在每个用户单元处经由卫星转发器接收共享资源信号; 在每个用户单元处测量所接收的共享资源信号的信号强度; 向网关发送信号强度; 以及基于所述信号强度调整由所述卫星应答器发送的所述共享资源信号的功率。

    Vertically correcting antenna for portable telephone handsets
    2.
    发明授权
    Vertically correcting antenna for portable telephone handsets 失效
    用于便携式电话手机的垂直校正天线

    公开(公告)号：US5844985A

    公开(公告)日：1998-12-01

    申请号：US532920

    申请日：1995-09-22

    申请人： Eric C. Kulberg ,  William R. Panton ,  James H. Thompson ,  Stephen B. Tidwell ,  Robert P. Gilmore

    发明人： Eric C. Kulberg ,  William R. Panton ,  James H. Thompson ,  Stephen B. Tidwell ,  Robert P. Gilmore

    IPC分类号： H01Q1/18 ,  H01Q1/24 ,  H04B1/38 ,  H04M1/00

    CPC分类号： H04B1/3833 ,  H01Q1/18 ,  H01Q1/242

    摘要： A portable phone unit for use in satellite communication systems has a vertically correcting antenna module pivotally secured to the handset for free rotation about a pivot axis. The module contains a mechanism, such as a gravitational counterweight for urging the module to pivot into a predetermined vertical orientation regardless of the handset orientation. An antenna projects from the module in a direction which is vertically upright when the module is in its predetermined vertical orientation. A mast mounted antenna module can also be used to take advantage of dissimilar antenna segment weights for multiple frequency antennas. As the handset is moved into an angular orientation, the module pivots under the weight of the counterweight, or a portion of the antenna itself, until the antenna is oriented vertically.

    摘要翻译： 用于卫星通信系统的便携式电话单元具有可枢转地固定到手机上的垂直校正天线模块，用于围绕枢转轴线自由旋转。 模块包含机构，例如重力配重，用于促使模块枢转到预定的垂直方向，而不管手柄方向如何。 当模块处于其预定的垂直方向时，天线从垂直竖直的方向从模块突出。 桅杆安装天线模块也可用于利用多个频率天线的不同天线分段权重。 当手机移动到角度方向时，模块在配重或天线本身的一部分的重量下枢转，直到天线垂直取向。

    Direct digital synthesizer driven phase lock loop frequency synthesizer with clean up phase lock loop
    4.
    发明授权
    Direct digital synthesizer driven phase lock loop frequency synthesizer with clean up phase lock loop 失效
    直接数字合成器驱动锁相环频率合成器，具有清理锁相环

    公开(公告)号：US5757239A

    公开(公告)日：1998-05-26

    申请号：US780472

    申请日：1997-01-08

    申请人： Robert P. Gilmore

    发明人： Robert P. Gilmore

    IPC分类号： H03L7/16 ,  H03L7/18 ,  H03L7/22 ,  H03L7/23 ,  H03K3/80

    CPC分类号： H03L7/22 ,  H03L7/1806 ,  H03L7/23

    摘要： A frequency synthesizer which uses a direct digital synthesizer (DDS) to generate a highly accurate periodic signal of a frequency selected from a plurality of reference frequencies. The DDS output signal is bandpass filtered utilizing a clean-up phase lock loop (PLL) to produce a spectrally pure reference signal and promote overall fast settling time. A second or primary phase lock loop, having a much faster settling time than the first PLL, adjusts the frequency of the reference signal generated by the clean-up PLL. In one embodiment, the DDS frequency synthesizer has a digital to analog (DAC) converter coupled to the clean-up PLL. Another embodiment uses a modified DDS (without a DAC or lookup table) and feeds the most significant bit (MSB) or overflow bit from the DAC accumulator into the "clean-up" PLL. In both embodiments, the resulting synthesizer has high spectral purity, fine frequency resolution and a fast settling time. Yet another embodiment uses a switching apparatus to bypass the "clean-up" PLL while it is settling on a new frequency. Once the "clean-up" PLL settles on the new frequency the switches are set to couple the "clean-up" PLL back into the synthesizer apparatus.

    摘要翻译： 一种频率合成器，其使用直接数字合成器（DDS）来产生从多个参考频率中选择的频率的高度精确的周期信号。 使用清理锁相环（PLL）对DDS输出信号进行带通滤波，以产生光谱纯参考信号，并促进整体快速建立时间。 具有比第一PLL更快的建立时间的第二或主要锁相环调整由清理PLL产生的参考信号的频率。 在一个实施例中，DDS频率合成器具有耦合到清理PLL的数模转换器（DAC）转换器。 另一个实施例使用修改的DDS（没有DAC或查找表），并将来自DAC累加器的最高有效位（MSB）或溢出位馈送到“清理”PLL。 在两个实施例中，所得的合成器具有高光谱纯度，精细的频率分辨率和快速的建立时间。 另一个实施例使用开关装置来绕过“清理”PLL，同时在新频率上稳定。 一旦“清理”PLL固定在新频率上，则开关被设置为将“清理”PLL耦合回合成器装置。

    High-speed high-power semiconductor devices
    5.
    发明授权
    High-speed high-power semiconductor devices 有权
    高速大功率半导体器件

    公开(公告)号：US09543383B2

    公开(公告)日：2017-01-10

    申请号：US13103918

    申请日：2011-05-09

    申请人： Yang Du ,  Vladimir Aparin ,  Robert P. Gilmore

    发明人： Yang Du ,  Vladimir Aparin ,  Robert P. Gilmore

    IPC分类号： H01L29/40 ,  H01L29/06 ,  H01L29/66 ,  H01L29/78 ,  H01L29/423 ,  H01L29/786 ,  H01L29/10

    CPC分类号： H01L29/0653 ,  H01L29/0692 ,  H01L29/1045 ,  H01L29/402 ,  H01L29/42384 ,  H01L29/66659 ,  H01L29/66689 ,  H01L29/7824 ,  H01L29/7835 ,  H01L29/78624 ,  H01L29/78645

    摘要： High-speed high-power semiconductor devices are disclosed. In an exemplary design, a high-speed high-power semiconductor device includes a source, a drain to provide an output signal, and an active gate to receive an input signal. The semiconductor device further includes at least one field gate located between the active gate and the drain, at least one shallow trench isolation (STI) strip formed transverse to the at least one field gate, and at least one drain active strip formed parallel to, and alternating with, the at least one STI strip. The semiconductor device may be modeled by a combination of an active FET and a MOS varactor. The active gate controls the active FET, and the at least one field gate controls the MOS varactor. The semiconductor device has a low on resistance and can handle a high voltage.

    摘要翻译： 公开了高速大功率半导体器件。 在示例性设计中，高速大功率半导体器件包括源极，提供输出信号的漏极和用于接收输入信号的有源栅极。 所述半导体器件还包括位于有源栅极和漏极之间的至少一个场栅极，至少一个横向于至少一个场栅极形成的浅沟槽隔离（STI）条和至少一个平行于该栅极的漏极有源条， 并与所述至少一个STI条交替。 半导体器件可以通过有源FET和MOS变容二极管的组合来建模。 有源栅极控制有源FET，并且至少一个场门控制MOS变容二极管。 半导体器件具有低导通电阻并且可以处理高电压。

    Signal separation for energy harvesting
    6.
    发明授权
    Signal separation for energy harvesting 失效
    能量收集信号分离

    公开(公告)号：US08611820B2

    公开(公告)日：2013-12-17

    申请号：US12564767

    申请日：2009-09-22

    申请人： Robert P. Gilmore

    发明人： Robert P. Gilmore

    IPC分类号： H04B7/00

    CPC分类号： H04B1/3877 ,  H02J7/025 ,  H02J17/00 ,  H02J50/20 ,  H04M1/6066

    摘要： Techniques for designing a communications unit including a signal separation module for energy harvesting. In an exemplary aspect, the signal separation module includes first and second quadrature hybrids coupled by band-pass filters (BPF's). Incoming signals within the pass-band of the BPF's are directed through the quadrature hybrids and through the BPF's, and emerge as a desired pass-band signal to be processed by an RX processing module. Incoming signals lying outside the pass-band of the BPF's are reflected from the BPF's back to the first quadrature hybrid, and output as a non-pass-band signal to be processed by an energy harvesting module. In a further exemplary aspect, the signal separation module resides in a detachable module coupleable to a wireless communications device, and a signal transmitted by the wireless communications device is coupled to the signal separation module for energy harvesting.

    摘要翻译： 用于设计包括用于能量收集的信号分离模块的通信单元的技术。 在示例性方面，信号分离模块包括通过带通滤波器（BPF）耦合的第一和第二正交混合。 BPF通带内的传入信号通过正交混合和通过BPF引导，并出现为要由RX处理模块处理的期望的通带信号。 位于BPF通带外的传入信号从BPF反射回第一正交混合，并作为非通带信号输出，由能量采集模块处理。 在另一示例性方面，信号分离模块驻留在可耦合到无线通信设备的可拆卸模块中，并且由无线通信设备发送的信号耦合到用于能量收集的信号分离模块。

    Walking weaver image reject mixer for radio
    8.
    发明授权
    Walking weaver image reject mixer for radio 失效

    公开(公告)号：US07013120B2

    公开(公告)日：2006-03-14

    申请号：US10043746

    申请日：2002-01-08

    申请人： Robert P. Gilmore

    发明人： Robert P. Gilmore

    IPC分类号： H04B1/10

    CPC分类号： H03D7/18 ,  H03D7/166

    摘要： Methods and apparatus for implementing image rejection in radio receivers or transmitters includes a Weaver image reject mixer modified so that only one local oscillator is used for the highest mixing frequency, and subsequent lower frequency mixing signals fed to the mixers are derived from digital frequency divider networks which produce both in-phase and quadrature versions of their pre-determined output frequencies. By using frequency dividers to generate these subsequent lower frequency signals, the intermediate frequencies walk; and when these frequency dividers are set to divide by multiples of two, generating quadrature signals becomes straightforward.

    Active cancellation of a wireless coupled transmit signal
    9.
    发明授权
    Active cancellation of a wireless coupled transmit signal 有权
    主动消除无线耦合发射信号

    公开(公告)号：US06745018B1

    公开(公告)日：2004-06-01

    申请号：US09677070

    申请日：2000-09-29

    申请人： Ephraim Zehavi ,  Robert P. Gilmore ,  Robert Wentworth ,  James Gilb

    发明人： Ephraim Zehavi ,  Robert P. Gilmore ,  Robert Wentworth ,  James Gilb

    IPC分类号： H04Q720

    CPC分类号： H04B1/525 ,  H04B1/123

    摘要： An active cancellation device receives a model of a first signal from a local wireless transmitter. The first signal causes a coupled signal that interferes in a second signal received by a local wireless receiver from a remote wireless transmitter. The active cancellation device generates a cancellation signal based on the model of the first signal, and provides the cancellation signal to the local wireless receiver. At the local wireless receiver, the cancellation signal combines with the coupled signal and the second signal. The cancellation signal reduces the interference in the second signal caused by the coupled signal.

    摘要翻译： 主动消除装置从本地无线发射机接收第一信号的模型。 第一信号引起耦合信号干扰由本地无线接收器从远程无线发射机接收的第二信号。 主动消除装置基于第一信号的模型产生消除信号，并将该消除信号提供给本地无线接收机。 在本地无线接收机处，消除信号与耦合信号和第二信号相结合。 消除信号减少由耦合信号引起的第二信号的干扰。

    Direct digital synthesizer driven phase lock loop frequency synthesizer with hard limiter
    10.
    发明授权
    Direct digital synthesizer driven phase lock loop frequency synthesizer with hard limiter 失效
    直接数字合成器驱动锁相环频率合成器与硬限幅器

    公开(公告)号：US5028887A

    公开(公告)日：1991-07-02

    申请号：US502101

    申请日：1990-03-29

    申请人： Robert P. Gilmore

    发明人： Robert P. Gilmore

    IPC分类号： H03B28/00 ,  H03L7/18 ,  H03L7/183

    CPC分类号： H03L7/183 ,  H03L7/1806

    摘要： A frequency synthesizer which uses a direct digital synthesizer (DDS) to generate a highly accurate periodic signal of a frequency selected from a plurality of reference frequencies. The DDS output signal is bandpass filtered and amplitude limited to reduce spurious noise. In one embodiment, the DDS frequency synthesizer is coupled to a phase lock loop which receives the DDS generated reference signal and a divide-by-N signal for generating an output signal at a frequency determined by the divide-by-N signal. The frequency resolution of the phase lock loop is N times the reference signal. In a second embodiment, the DDS is incorporated within the feedback path of the phase lock loop. An input reference frequency signal is provided to the phase lock loop with the DDS clock signal provided as a function of the phase lock loop output frequency. The DDS receives an input frequency control signal which determines the DDS step size. The synthesizer output frequency is a function of the input reference frequency, the number of bits in the digital word of the frequency control signal and the DDS step size as determined by the frequency control signal. Optional dividers may be provided in the feedback path which may further affect the synthesizer output frequency.

    摘要翻译： 一种频率合成器，其使用直接数字合成器（DDS）来产生从多个参考频率中选择的频率的高度精确的周期信号。 DDS输出信号经过带通滤波和幅度限制，以减少杂散噪声。 在一个实施例中，DDS频率合成器被耦合到接收DDS产生的参考信号的锁相环和用于产生由N分频信号确定的频率的输出信号的N分频信号。 锁相环的频率分辨率是参考信号的N倍。 在第二实施例中，DDS被并入在锁相环的反馈路径内。 将输入参考频率信号提供给锁相环，其中DDS时钟信号作为锁相环输出频率的函数提供。 DDS接收确定DDS步长的输入频率控制信号。 合成器输出频率是输入参考频率，频率控制信号的数字字中的位数和由频率控制信号确定的DDS步长的函数。 可以在反馈路径中提供可选的分频器，其可以进一步影响合成器的输出频率。