公开(公告)号：US20060152818A1

公开(公告)日：2006-07-13

申请号：US11292315

申请日：2005-12-01

申请人： Roger Shum ,  Biay-Cheng Hseih ,  Mickaiel Kamran

发明人： Roger Shum ,  Biay-Cheng Hseih ,  Mickaiel Kamran

IPC分类号： G02B15/14

CPC分类号： G02B7/005 ,  G02B7/102

摘要： An adjustable lens system comprises a housing, an adjustable lens assembly, comprising a lens element, mounted to the housing and placeable in optical states, and a MEMS based micro-motor. The MEMS based micro-motor is mounted to the housing and is operably coupled to the lens assembly for movement of at least a portion of the lens assembly to change the optical state of the lens assembly.

摘要翻译： 可调透镜系统包括壳体，可调透镜组件，其包括安装到壳体并且可置于光学状态的透镜元件以及基于MEMS的微型电动机。 基于MEMS的微型电动机安装到壳体并且可操作地耦合到透镜组件，用于移动透镜组件的至少一部分以改变透镜组件的光学状态。

公开(公告)号：US08878601B2

公开(公告)日：2014-11-04

申请号：US13618290

申请日：2012-09-14

申请人： Jhy-Jyi Sze ,  Biay-Cheng Hseih ,  Shou-Gwo Wuu

发明人： Jhy-Jyi Sze ,  Biay-Cheng Hseih ,  Shou-Gwo Wuu

IPC分类号： G05F1/10 ,  G05F1/46

CPC分类号： G05F1/46 ,  G05F1/10 ,  G05F3/24 ,  H01L2924/0002 ,  H01L2924/00

摘要： A circuit includes a gate node, and a bias circuit coupled to the gate node. The bias circuit is configured to, in response to a change in a gate voltage on the gate node, provide a positive feedback to the gate voltage. A power circuit is coupled to the gate node, wherein the power circuit includes a power Metal-Oxide-Semiconductor (MOS) transistor. The power circuit is configured to, in response to a change in the gate voltage, provide a negative feedback to the gate voltage. An output node is coupled to the power circuit.

摘要翻译： 电路包括栅极节点和耦合到栅极节点的偏置电路。 偏置电路被配置为响应于栅极节点上的栅极电压的变化，向栅极电压提供正反馈。 电源电路耦合到栅极节点，其中电源电路包括功率金属氧化物半导体（MOS）晶体管。 电源电路被配置为响应于栅极电压的变化，向栅极电压提供负反馈。 输出节点耦合到电源电路。

公开(公告)号：US20130321073A1

公开(公告)日：2013-12-05

申请号：US13618290

申请日：2012-09-14

申请人： Jhy-Jyi Sze ,  Biay-Cheng Hseih ,  Shou-Gwo Wuu

发明人： Jhy-Jyi Sze ,  Biay-Cheng Hseih ,  Shou-Gwo Wuu

IPC分类号： G05F1/10 ,  H01L25/00

CPC分类号： G05F1/46 ,  G05F1/10 ,  G05F3/24 ,  H01L2924/0002 ,  H01L2924/00

摘要： A circuit includes a gate node, and a bias circuit coupled to the gate node. The bias circuit is configured to, in response to a change in a gate voltage on the gate node, provide a positive feedback to the gate voltage. A power circuit is coupled to the gate node, wherein the power circuit includes a power Metal-Oxide-Semiconductor (MOS) transistor. The power circuit is configured to, in response to a change in the gate voltage, provide a negative feedback to the gate voltage. An output node is coupled to the power circuit.

摘要翻译： 电路包括栅极节点和耦合到栅极节点的偏置电路。 偏置电路被配置为响应于栅极节点上的栅极电压的变化，向栅极电压提供正反馈。 电源电路耦合到栅极节点，其中电源电路包括功率金属氧化物半导体（MOS）晶体管。 电源电路被配置为响应于栅极电压的变化，向栅极电压提供负反馈。 输出节点耦合到电源电路。

公开(公告)号：US08735937B2

公开(公告)日：2014-05-27

申请号：US13601229

申请日：2012-08-31

申请人： Jhy-Jyi Sze ,  Biay-Cheng Hseih ,  Shou-Gwo Wuu

发明人： Jhy-Jyi Sze ,  Biay-Cheng Hseih ,  Shou-Gwo Wuu

IPC分类号： H01L29/66 ,  H01L21/70

CPC分类号： H01L29/66325 ,  H01L21/265 ,  H01L21/304 ,  H01L21/76 ,  H01L21/761 ,  H01L21/76224 ,  H01L29/0696 ,  H01L29/7393 ,  H01L29/7394

摘要： A device includes a dielectric layer, and a heavily doped semiconductor layer over the dielectric layer. The heavily doped semiconductor layer is of a first conductivity type. A semiconductor region is over the heavily doped semiconductor layer, wherein the semiconductor region is of a second conductivity type opposite the first conductivity type. A Lateral Insulated Gate Bipolar Transistor (LIGBT) is disposed at a surface of the semiconductor region.

摘要翻译： 一种器件包括电介质层和介电层上的重掺杂半导体层。 重掺杂半导体层是第一导电类型。 半导体区域在重掺杂半导体层之上，其中半导体区域是与第一导电类型相反的第二导电类型。 横向绝缘栅双极晶体管（LIGBT）设置在半导体区域的表面。

公开(公告)号：US20130320397A1

公开(公告)日：2013-12-05

申请号：US13601229

申请日：2012-08-31

申请人： Jhy-Jyi Sze ,  Biay-Cheng Hseih ,  Shou-Gwo Wuu

发明人： Jhy-Jyi Sze ,  Biay-Cheng Hseih ,  Shou-Gwo Wuu

IPC分类号： H01L29/739 ,  H01L21/332

CPC分类号： H01L29/66325 ,  H01L21/265 ,  H01L21/304 ,  H01L21/76 ,  H01L21/761 ,  H01L21/76224 ,  H01L29/0696 ,  H01L29/7393 ,  H01L29/7394

摘要： A device includes a dielectric layer, and a heavily doped semiconductor layer over the dielectric layer. The heavily doped semiconductor layer is of a first conductivity type. A semiconductor region is over the heavily doped semiconductor layer, wherein the semiconductor region is of a second conductivity type opposite the first conductivity type. A Lateral Insulated Gate Bipolar Transistor (LIGBT) is disposed at a surface of the semiconductor region.

公开(公告)号：US06593607B1

公开(公告)日：2003-07-15

申请号：US09408454

申请日：1999-09-30

申请人： Biay-Cheng Hseih

发明人： Biay-Cheng Hseih

IPC分类号： H01L31062

CPC分类号： H01L27/14643 ,  H01L27/1463 ,  H01L27/14645 ,  H01L31/0352 ,  H01L31/103

摘要： The invention is directed to an image sensor with enhanced blue response and limited cross-talk. The image sensor is made of a photodiode layer. Disposed on one side of the photodiode layer is a substrate layer made out of an oppositely charged semiconductor material. The substrate layer is further defined by two different sub-layers, where the doping densities of the sub-layers differ. This difference in doping creates a deep electric field that inhibits carriers from moving to another sensor. Additionally, the potential of the deep electric field directs these carriers back to the N-P junction formed by the substrate layer and the photodiode layer. Working in conjunction with this, a shallow implant layer is disposed on the opposite side of the photodiode layer. The shallow implant layer creates an electric field between the photodiode layer and the shallow implant layer, directing carriers to the photodiode layer. As such, carriers generated in the shallow areas of the image sensor are discouraged from surface recombination effects.

摘要翻译： 本发明涉及具有增强的蓝色响应和有限的串扰的图像传感器。 图像传感器由光电二极管层制成。 设置在光电二极管层的一侧的是由相反电荷的半导体材料制成的衬底层。 衬底层进一步由两个不同的子层限定，其中子层的掺杂密度不同。 这种掺杂差异会产生一个深的电场，从而抑制载流子移动到另一个传感器。 此外，深电场的电位将这些载流子引导回由基底层和光电二极管层形成的N-P结。 与此结合使用，在光电二极管层的相反侧设置浅的注入层。 浅注入层在光电二极管层和浅注入层之间产生电场，将载流子导向光电二极管层。 因此，在图像传感器的浅区域中产生的载体不被表面重组效应阻止。

公开(公告)号：US6022482A

公开(公告)日：2000-02-08

申请号：US905759

申请日：1997-08-04

申请人： Jingkuang Chen ,  Biay-Cheng Hseih

发明人： Jingkuang Chen ,  Biay-Cheng Hseih

IPC分类号： B41J2/05 ,  B41J2/14 ,  B41J2/16 ,  G01D15/00 ,  G11B5/265

CPC分类号： B41J2/1433 ,  B41J2/14072 ,  B41J2/14129 ,  B41J2/1603 ,  B41J2/1628 ,  B41J2/1629 ,  B41J2/1631 ,  B41J2/1639 ,  B41J2/1642 ,  B41J2/1645 ,  B41J2/1646 ,  B41J2002/14475 ,  B41J2202/13

摘要： A method and structure are described for a monolithic roofshooter ink jet printhead which has nozzles and ink channels formed in a polyimide layer overlying a silicon substrate. Resistor heaters, addressing logic circuitry, and ink inlets are formed in a silicon substrate. A fabrication process, simple and monolithic, is performed at low temperatures resulting in a structure which has nozzle diameters of 30 .mu. separated by distances of 10 .mu. or less. This structure results in a printhead which has a printing resolution of 630 dpi.

摘要翻译： 对于在覆盖硅衬底的聚酰亚胺层中形成的喷嘴和油墨通道的单片屋顶喷墨打印头描述了一种方法和结构。 电阻加热器，寻址逻辑电路和墨水入口形成在硅衬底中。 在低温下进行简单且整体的制造工艺，得到喷嘴直径为30微米，间距为10微米或更小的结构。 该结构导致打印分辨率为630dpi的打印头。

公开(公告)号：US6102528A

公开(公告)日：2000-08-15

申请号：US953656

申请日：1997-10-17

申请人： Cathie J. Burke ,  Biay-Cheng Hseih ,  William G. Hawkins

发明人： Cathie J. Burke ,  Biay-Cheng Hseih ,  William G. Hawkins

IPC分类号： B41J2/05 ,  B41J2/14 ,  B41J2/16 ,  H01L29/76

CPC分类号： B41J2/0455 ,  B41J2/0458 ,  B41J2/14072 ,  B41J2202/13

摘要： A drive transistor for a high resolution ink jet printhead having a pocket implant in the gate region of the device. The pocket implant enables a reduced source to drain spacing without loss of breakdown voltage. Accordingly, the size of the transistor may be reduced. Alternatively, this device is suitable for addressing 1200 spi resolution printheads. In one embodiment, the pocket implant extends about 1 .mu.m beyond the gate region towards the drain region. Both embodiments produce a graded drift region.

摘要翻译： 一种用于高分辨率喷墨打印头的驱动晶体管，其具有在该器件的栅极区域中的凹穴注入。 袋式注入使得能够减少源极间距而不损失击穿电压。 因此，可以减小晶体管的尺寸。 或者，该器件适用于寻址1200个spi分辨率打印头。 在一个实施例中，口袋植入物向漏极区域延伸超过栅极区域约1μm。 两个实施例都产生渐变漂移区域。