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    Noise-reducing transistor arrangement
    1.
    发明授权
    Noise-reducing transistor arrangement 有权
    降噪晶体管布置

    公开(公告)号：US07733157B2

    公开(公告)日：2010-06-08

    申请号：US10583538

    申请日：2004-12-03

    申请人： Ralf Brederlow ,  Jeongwook Koh ,  Christian Pacha ,  Roland Thewes

    发明人： Ralf Brederlow ,  Jeongwook Koh ,  Christian Pacha ,  Roland Thewes

    IPC分类号： H03K17/687

    CPC分类号： H03K17/162 ,  H01L2924/0002 ,  H01L2924/00

    摘要： Noise-reducing transistor arrangement having first and second field effect transistors (FETs) having source terminals coupled together, drain terminals coupled together, and control terminals for application of a first or second signal. A clock generator unit is configured to provide the first and second signals alternately to the FETs with an alternating frequency which is at least as great as the cut-off frequency of the noise characteristic of the FETs, or with a reciprocal alternating frequency which is less than a mean lifetime of an occupation state of a defect in the boundary region between channel region and gate insulating layer of the FETs. The first signal is applied to the control terminal of the first FET and, simultaneously, the second signal to the control terminal of the second FET. The second signal is applied to the control terminal of the first FET and, simultaneously, the first signal to the control terminal of the second FET.

    摘要翻译： 具有第一和第二场效应晶体管（FET）的降噪晶体管装置，其具有耦合在一起的源极端子，耦合在一起的漏极端子和用于施加第一或第二信号的控制端子。 时钟发生器单元被配置为以至少与FET的噪声特性的截止频率一样大的交变频率或者具有较小的互逆交变频率来向FET施加交替的第一和第二信号 比FET的沟道区域和栅极绝缘层之间的边界区域的缺陷的占用状态的平均寿命长。 第一信号被施加到第一FET的控制端子，并且同时将第二信号施加到第二FET的控制端子。 第二信号被施加到第一FET的控制端，同时将第一信号施加到第二FET的控制端。

    FREQUENCY-DIVIDER CIRCUIT ARRANGEMENT
    2.
    发明申请
    FREQUENCY-DIVIDER CIRCUIT ARRANGEMENT 审中-公开
    频率分路器电路布置

    公开(公告)号：US20070052457A1

    公开(公告)日：2007-03-08

    申请号：US11470470

    申请日：2006-09-06

    申请人： Roland Thewes ,  Christian Pacha ,  Ralf Brederlow

    发明人： Roland Thewes ,  Christian Pacha ,  Ralf Brederlow

    IPC分类号： H03K23/00

    CPC分类号： H03K23/425

    摘要： A frequency-divider circuit arrangement having a power supply, a first clock signal, a second clock signal, a first switch unit, a first capacitance which is connected downstream from the first switch unit is disclosed. A second switch unit is connected downstream from the first capacitance and is controlled by the second clock signal, a second capacitance is connected downstream from the second switch unit and is connected in parallel to the first capacitance, a clock-signal control unit, a capacitance discharge device and a capacitance discharge device control unit.

    摘要翻译： 公开了一种具有电源，第一时钟信号，第二时钟信号，第一开关单元，连接在第一开关单元下游的第一电容的分频器电路装置。 第二开关单元连接在第一电容的下游并由第二时钟信号控制，第二电容连接到第二开关单元的下游并且并联连接到第一电容，时钟信号控制单元，电容 放电装置和电容放电装置控制单元。

    Label identification system and coding method suited therefor
    3.
    发明申请
    Label identification system and coding method suited therefor 失效
    标签识别系统及其编码方法

    公开(公告)号：US20050116037A1

    公开(公告)日：2005-06-02

    申请号：US10504376

    申请日：2003-02-12

    申请人： Ralf Brederlow ,  Christian Pacha ,  Roland Thewes ,  Werner Weber

    发明人： Ralf Brederlow ,  Christian Pacha ,  Roland Thewes ,  Werner Weber

    IPC分类号： G06K19/07 ,  G06K7/08 ,  G06K17/00 ,  G06K19/067 ,  G09F3/00 ,  H04B5/02

    CPC分类号： G06K7/10336 ,  G06K7/086 ,  G06K19/067

    摘要： The invention relates to a label identification system comprised of a transmitting-receiving unit and of identification labels on which the identification information is stored in the form of a digital identification information word. The provision of a circuit on the identification label in the form of a circuit arrangement, which is prefabricated using a polymer technique and on which the identification information is subsequently placed by the offset printing of conductor tracks, enables the provision of an identification label involving a minimal consumption of energy during inexpensive mass production. The bulk of the identification information processing is transferred to the transmitting-receiving unit.

    摘要翻译： 本发明涉及一种标签识别系统，包括发送接收单元和识别标签，识别信息以数字识别信息字的形式存储在其上。 使用聚合物技术预制的电路装置形式的识别标签上的电路的提供，并且随后通过导体迹线的胶印印刷识别信息，能够提供涉及 在廉价大规模生产中能量消耗最小化。 识别信息处理的大部分被传送到发送 - 接收单元。

    Electronic component with ID tags
    4.
    发明授权
    Electronic component with ID tags 有权
    具有ID标签的电子元件

    公开(公告)号：US07817037B2

    公开(公告)日：2010-10-19

    申请号：US10562458

    申请日：2004-06-30

    申请人： Ralf Brederlow ,  Sylvain Briole ,  Christian Pacha ,  Roland Thewes ,  Werner Weber

    发明人： Ralf Brederlow ,  Sylvain Briole ,  Christian Pacha ,  Roland Thewes ,  Werner Weber

    IPC分类号： G08B13/14 ,  H03K7/08

    CPC分类号： G06K19/0723

    摘要： The invention relates to an electronic component that can be operated by means of an alternating voltage. Said component includes at least one input, at least one output and a pair of electronic sub-components with an identical function. The input(s) of the electronic component is/are coupled to a respective input of the electronic sub-components with an identical function and the output(s) of the electronic component is/are coupled to a respective output of said electronic sub-components. In addition, the electronic component is configured in such a way that at least one output only one output signal of the first sub-component of the pair of functionally identical electronic components can be picked up during a first half-wave of an alternating voltage, whereas only one output signal of the second sub-component of the pair of functionally identical electronic can be picked up during the second half-wave of the alternating voltage.

    摘要翻译： 本发明涉及可以通过交流电压操作的电子部件。 所述组件包括具有相同功能的至少一个输入，至少一个输出和一对电子子部件。 电子部件的输入端以相同的功能耦合到电子子部件的相应输入端，并且电子部件的输出耦合到所述电子部件的相应输出端， 组件。 此外，电子部件被配置为使得在交流电压的第一半波期间可以拾取一对功能相同的电子部件中的第一子部件的至少一个输出信号的一个输出信号， 而一对功能相同的电子对的第二子分量的一个输出信号可以在交流电压的第二个半波期间被拾取。

    Rectifier Circuit, Circuit Arrangement and Method for Manufactiring a Rectifier Circuit
    5.
    发明申请
    Rectifier Circuit, Circuit Arrangement and Method for Manufactiring a Rectifier Circuit 审中-公开
    整流电路，电路布置及整流电路制造方法

    公开(公告)号：US20080259665A1

    公开(公告)日：2008-10-23

    申请号：US11629941

    申请日：2005-05-18

    申请人： Ralf Brederlow ,  Christian Pacha ,  Roland Thewes ,  Werner Weber

    发明人： Ralf Brederlow ,  Christian Pacha ,  Roland Thewes ,  Werner Weber

    IPC分类号： H02M7/217

    CPC分类号： H02M7/217 ,  G01S13/75 ,  H02M7/219

    摘要： One aspect of the invention relates to a rectifier circuit for providing a rectified voltage, with a first AC voltage terminal to which an AC voltage can be applied, with a first DC voltage terminal to which a DC voltage can be provided, and with a control switching element between the first AC voltage terminal and the first DC voltage terminal. The control switching element only couples the first AC voltage terminal to the first DC voltage terminal if the electrical potential at the first AC voltage terminal has a predeterminable polarity compared with a reference potential and if the amount of the electrical potential at the first DC voltage terminal is less than or equal to the amount of the electrical potential at the first AC voltage terminal.

    摘要翻译： 本发明的一个方面涉及一种用于提供整流电压的整流器电路，其中可以施加有交流电压的第一交流电压端子与可以提供直流电压的第一直流电压端子和控制器 第一交流电压端子和第一直流电压端子之间的开关元件。 如果第一AC电压端子的电位与参考电位相比具有可预定的极性，并且如果第一直流电压端子处的电位量，则控制开关元件仅将第一AC电压端子耦合到第一DC电压端子 小于或等于第一AC电压端子处的电位量。

    Noise-Reducing Transistor Arrangement, Integrated Circuit, and Method for Reducing the Noise of Field Effect Transistors
    6.
    发明申请
    Noise-Reducing Transistor Arrangement, Integrated Circuit, and Method for Reducing the Noise of Field Effect Transistors 有权
    降噪晶体管布置，集成电路和降低场效应晶体管噪声的方法

    公开(公告)号：US20070279120A1

    公开(公告)日：2007-12-06

    申请号：US10583538

    申请日：2004-12-03

    申请人： Ralf Brederlow ,  Jeongwook Koh ,  Christian Pacha ,  Roland Thewes

    发明人： Ralf Brederlow ,  Jeongwook Koh ,  Christian Pacha ,  Roland Thewes

    IPC分类号： H03K17/16

    CPC分类号： H03K17/162 ,  H01L2924/0002 ,  H01L2924/00

    摘要： Noise-reducing transistor arrangement having first and second field effect transistors (FETs) having source terminals coupled together, drain terminals coupled together, and control terminals for application of a first or second signal. A clock generator unit is configured to provide the first and second signals alternately to the FETs with an alternating frequency which is at least as great as the cut-off frequency of the noise characteristic of the FETs, or with a reciprocal alternating frequency which is less than a mean lifetime of an occupation state of a defect in the boundary region between channel region and gate insulating layer of the FETs. The first signal is applied to the control terminal of the first FET and, simultaneously, the second signal to the control terminal of the second FET. The second signal is applied to the control terminal of the first FET and, simultaneously, the first signal to the control terminal of the second FET.

    摘要翻译： 具有第一和第二场效应晶体管（FET）的降噪晶体管装置，其具有耦合在一起的源极端子，耦合在一起的漏极端子和用于施加第一或第二信号的控制端子。 时钟发生器单元被配置为以至少与FET的噪声特性的截止频率一样大的交变频率或者具有较小的互逆交变频率来向FET施加交替的第一和第二信号 比FET的沟道区域和栅极绝缘层之间的边界区域的缺陷的占用状态的平均寿命长。 第一信号被施加到第一FET的控制端子，并且同时将第二信号施加到第二FET的控制端子。 第二信号被施加到第一FET的控制端，同时将第一信号施加到第二FET的控制端。

    Label identification system and coding method suited therefor
    7.
    发明授权
    Label identification system and coding method suited therefor 失效
    标签识别系统及其编码方法

    公开(公告)号：US07429001B2

    公开(公告)日：2008-09-30

    申请号：US10504376

    申请日：2003-02-12

    申请人： Ralf Brederlow ,  Christian Pacha ,  Roland Thewes ,  Werner Weber

    发明人： Ralf Brederlow ,  Christian Pacha ,  Roland Thewes ,  Werner Weber

    IPC分类号： G06K19/06 ,  G06K7/08 ,  H04Q5/22

    CPC分类号： G06K7/10336 ,  G06K7/086 ,  G06K19/067

    摘要： The invention relates to a label identification system comprised of a transmitting-receiving unit and of identification labels on which the identification information is stored in the form of a digital identification information word. The provision of a circuit on the identification label in the form of a circuit arrangement, which is prefabricated using a polymer technique and on which the identification information is subsequently placed by the offset printing of conductor tracks, enables the provision of an identification label involving a minimal consumption of energy during inexpensive mass production. The bulk of the identification information processing is transferred to the transmitting-receiving unit.

    摘要翻译： 本发明涉及一种标签识别系统，包括发送接收单元和识别标签，识别信息以数字识别信息字的形式存储在其上。 使用聚合物技术预制的电路装置形式的识别标签上的电路的提供，并且随后通过导体迹线的胶印印刷识别信息，能够提供涉及 在廉价大规模生产中能量消耗最小化。 识别信息处理的大部分被传送到发送 - 接收单元。

    ELECTRONIC COMPONENT WITH ID TAGS
    8.
    发明申请
    ELECTRONIC COMPONENT WITH ID TAGS 有权
    具有ID标签的电子组件

    公开(公告)号：US20070085582A1

    公开(公告)日：2007-04-19

    申请号：US10562458

    申请日：2004-06-30

    申请人： Ralf Brederlow ,  Sylvain Briole ,  Christian Pacha ,  Roland Thewes ,  Werner Weber

    发明人： Ralf Brederlow ,  Sylvain Briole ,  Christian Pacha ,  Roland Thewes ,  Werner Weber

    IPC分类号： H03K7/08

    CPC分类号： G06K19/0723

    摘要： The invention relates to an electronic component that can be operated by means of an alternating voltage. Said component includes at least one input, at least one output and a pair of electronic sub-components with an identical function. The input(s) of the electronic component is/are coupled to a respective input of the electronic sub-components with an identical function and the output(s) of the electronic component is/are coupled to a respective output of said electronic sub-components. In addition, the electronic component is configured in such a way that at least one output only one output signal of the first sub-component of the pair of functionally identical electronic components can be picked up during a first half-wave of an alternating voltage, whereas only one output signal of the second sub-component of the pair of functionally identical electronic can be picked up during the second half-wave of the alternating voltage.

    摘要翻译： 本发明涉及可以通过交流电压操作的电子部件。 所述组件包括具有相同功能的至少一个输入，至少一个输出和一对电子子部件。 电子部件的输入端以相同的功能耦合到电子子部件的相应输入端，并且电子部件的输出耦合到所述电子部件的相应输出端， 组件。 此外，电子部件被配置为使得在交流电压的第一半波期间可以拾取一对功能相同的电子部件中的第一子部件的至少一个输出信号的一个输出信号， 而一对功能相同的电子对的第二子分量的一个输出信号可以在交流电压的第二个半波期间被拾取。

    Transistor arrangement, integrated circuit and method for operating field effect transistors
    10.
    发明授权
    Transistor arrangement, integrated circuit and method for operating field effect transistors 有权
    晶体管布置，集成电路和操作场效应晶体管的方法

    公开(公告)号：US07733156B2

    公开(公告)日：2010-06-08

    申请号：US10570924

    申请日：2004-09-01

    申请人： Ralf Brederlow ,  Jeongwook Koh ,  Roland Thewes

    发明人： Ralf Brederlow ,  Jeongwook Koh ,  Roland Thewes

    IPC分类号： H03K17/16 ,  H03K17/687

    CPC分类号： H03F3/211 ,  H01L2924/0002 ,  H03F1/26 ,  H03F3/72 ,  H03F2203/21178 ,  H03F2203/7215 ,  H01L2924/00

    摘要： The transistor arrangement contains a first and a second field effect transistor comprising a first and a second source drain connection and a control connection for applying a first or a second signal. The two field effect transistors are of the same conductive type. The transistor arrangement is configured in such a manner that the first signal can be applied in an alternating manner to the control connection of the first field effect transistor and the second signal can be applied in a simultaneous manner to the control connection of the second field effect transistor, and/or the second signal can be applied to the control connection of the first field effect transistor and the first signal can be applied simultaneously to the control connection of the second field effect transistor.

    摘要翻译： 晶体管装置包括第一和第二场效应晶体管，其包括第一和第二源极漏极连接以及用于施加第一或第二信号的控制连接。 两个场效应晶体管具有相同的导电类型。 晶体管布置被配置为使得第一信号可以以交替方式施加到第一场效应晶体管的控制连接，并且第二信号可以以与第二场效应的控制连接同时的方式施加 晶体管和/或第二信号可以被施加到第一场效应晶体管的控制连接，并且第一信号可以同时施加到第二场效应晶体管的控制连接。