公开(公告)号：US20100167534A1

公开(公告)日：2010-07-01

申请号：US12722251

申请日：2010-03-11

申请人： Ronald Takao IWATA

发明人： Ronald Takao IWATA

IPC分类号： H01L21/768

CPC分类号： H01L21/76898 ,  H01L23/481 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/78 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/1134 ,  H01L2224/11901 ,  H01L2224/13009 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/136 ,  H01L2224/14181 ,  H01L2224/16146 ,  H01L2224/78301 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10329 ,  H01L2924/14 ,  H01L2224/451 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/45099

摘要： A semiconductor device with TSV and its fabrication method are revealed. The semiconductor device primarily comprises a chip and a flexible metal wire inside. A redistributed trace layer and a passivation layer are formed on the active surface of the chip. A through hole penetrates the chip from the active surface to the back surface, in which an insulation layer is disposed. The flexible metal wire has a first terminal and a second terminal where the first terminal is bonded to a redistributed pad of the redistributed trace layer and the second terminal passes through the through hole and protrudes from the back surface of the chip. Therefore, the flexible metal wire passing through the chip has two protruded integral terminals to achieve high stress resistance TSV with lower costs for good electrical connections of vertical stacking chips.

摘要翻译： 揭示了具有TSV的半导体器件及其制造方法。 半导体器件主要包括芯片和内部的柔性金属线。 在芯片的有源表面上形成再分布的迹线层和钝化层。 通孔从活性表面穿透芯片到背面，其中设置绝缘层。 柔性金属线具有第一端子和第二端子，其中第一端子接合到再分布的迹线层的重新分布的焊盘，并且第二端子穿过通孔并从芯片的后表面突出。 因此，穿过芯片的柔性金属线具有两个突出的集成端子，以实现高应力阻力TSV，具有较低的成本，用于垂直堆叠芯片的良好电连接。