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公开(公告)号：US08679968B2
公开(公告)日：2014-03-25
申请号：US13471846
申请日：2012-05-15
申请人： Ruilong Xie , Su Chen Fan , Pranatharthiharan Haran Balasubramanian , David Vaclav Horak , Ponoth Shom
发明人： Ruilong Xie , Su Chen Fan , Pranatharthiharan Haran Balasubramanian , David Vaclav Horak , Ponoth Shom
IPC分类号： H01L21/4763 , H01L21/44
CPC分类号： H01L21/823475 , H01L21/76897
摘要： A self-aligned source/drain contact formation process without spacer or cap loss is described. Embodiments include providing two gate stacks, each having spacers on opposite sides, and an interlayer dielectric (ILD) over the two gate stacks and in a space therebetween, forming a vertical contact opening within the ILD between the two gate stacks, and laterally removing ILD between the two gate stacks from the vertical contact opening toward the spacers, to form a contact hole.
摘要翻译： 描述了没有间隔物或盖损失的自对准源极/漏极接触形成过程。 实施例包括提供两个栅极堆叠，每个栅极堆叠在相对的两侧具有间隔物，以及位于两个栅极堆叠之间并在它们之间的空间中的层间电介质（ILD），在两个栅极堆叠之间的ILD内形成垂直接触开口，并横向移除ILD 在两个栅极堆叠之间从垂直接触开口朝向间隔件，形成接触孔。
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公开(公告)号：US20130307087A1
公开(公告)日：2013-11-21
申请号：US13471846
申请日：2012-05-15
申请人： Ruilong Xie , Su Chen Fan , Pranatharthiharan Haran Balasubramanian , David Vaclav Horak , Ponoth Shom
发明人： Ruilong Xie , Su Chen Fan , Pranatharthiharan Haran Balasubramanian , David Vaclav Horak , Ponoth Shom
IPC分类号： H01L27/088 , H01L21/311
CPC分类号： H01L21/823475 , H01L21/76897
摘要： A self-aligned source/drain contact formation process without spacer or cap loss is described. Embodiments include providing two gate stacks, each having spacers on opposite sides, and an interlayer dielectric (ILD) over the two gate stacks and in a space therebetween, forming a vertical contact opening within the ILD between the two gate stacks, and laterally removing ILD between the two gate stacks from the vertical contact opening toward the spacers, to form a contact hole.
摘要翻译： 描述了没有间隔物或盖损失的自对准源极/漏极接触形成过程。 实施例包括提供两个栅极堆叠，每个栅极堆叠在相对的两侧具有间隔物，以及位于两个栅极堆叠之间并在它们之间的空间中的层间电介质（ILD），在两个栅极堆叠之间的ILD内形成垂直接触开口，并横向移除ILD 在两个栅极堆叠之间从垂直接触开口朝向间隔件，形成接触孔。
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3.发明申请METHODS OF FORMING SEMICONDUCTOR DEVICES WITH SELF-ALIGNED CONTACTS AND THE RESULTING DEVICES 有权用自对准接触形成半导体器件的方法和结果器件公开(公告)号：US20140070285A1
公开(公告)日：2014-03-13
申请号：US13611652
申请日：2012-09-12
CPC分类号： H01L29/66545 , H01L21/76897 , H01L21/823431 , H01L21/823437 , H01L21/823468 , H01L29/6653 , H01L29/66553 , H01L29/66628 , H01L29/66636
摘要： One method includes forming a sacrificial gate structure above a substrate, forming a first sidewall spacer adjacent a sacrificial gate electrode, removing a portion of the first sidewall spacer to expose a portion of the sidewalls of the sacrificial gate electrode, and forming a liner layer on the exposed sidewalls of the sacrificial gate electrode and above a residual portion of the first sidewall spacer. The method further includes forming a first layer of insulating material above the liner layer, forming a second sidewall spacer above the first layer of insulating material and adjacent the liner layer, performing an etching process to remove the second sidewall spacer and sacrificial gate cap layer to expose an upper surface of the sacrificial gate electrode, removing the sacrificial gate electrode to define a gate cavity at least partially defined laterally by the liner layer, and forming a replacement gate structure in the cavity.
摘要翻译： 一种方法包括在衬底上形成牺牲栅极结构，形成邻近牺牲栅电极的第一侧壁间隔物，去除第一侧壁间隔物的一部分以暴露牺牲栅电极的侧壁的一部分，以及在衬底上形成衬层 牺牲栅电极的暴露的侧壁和第一侧壁间隔物的残留部分之上。 该方法还包括在衬垫层之上形成绝缘材料的第一层，在第一绝缘材料层之上形成第二侧壁隔离层并与衬里层相邻，执行蚀刻工艺以除去第二侧壁间隔物和牺牲栅极盖层， 暴露牺牲栅电极的上表面，去除牺牲栅电极以限定通过衬层至少部分地限定的侧壁的栅极腔，以及在空腔中形成替换栅极结构。
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4.发明授权Methods of forming semiconductor devices with self-aligned contacts and the resulting devices 有权形成具有自对准触头的半导体器件的方法以及所产生的器件公开(公告)号：US08753970B2
公开(公告)日：2014-06-17
申请号：US13611652
申请日：2012-09-12
IPC分类号： H01L21/3205 , H01L21/4763 , H01L21/28
CPC分类号： H01L29/66545 , H01L21/76897 , H01L21/823431 , H01L21/823437 , H01L21/823468 , H01L29/6653 , H01L29/66553 , H01L29/66628 , H01L29/66636
摘要： One method includes forming a sacrificial gate structure above a substrate, forming a first sidewall spacer adjacent a sacrificial gate electrode, removing a portion of the first sidewall spacer to expose a portion of the sidewalls of the sacrificial gate electrode, and forming a liner layer on the exposed sidewalls of the sacrificial gate electrode and above a residual portion of the first sidewall spacer. The method further includes forming a first layer of insulating material above the liner layer, forming a second sidewall spacer above the first layer of insulating material and adjacent the liner layer, performing an etching process to remove the second sidewall spacer and sacrificial gate cap layer to expose an upper surface of the sacrificial gate electrode, removing the sacrificial gate electrode to define a gate cavity at least partially defined laterally by the liner layer, and forming a replacement gate structure in the cavity.
摘要翻译： 一种方法包括在衬底上形成牺牲栅极结构，形成邻近牺牲栅电极的第一侧壁间隔物，去除第一侧壁间隔物的一部分以暴露牺牲栅电极的侧壁的一部分，以及在衬底上形成衬层 牺牲栅电极的暴露的侧壁和第一侧壁间隔物的残留部分之上。 该方法还包括在衬垫层之上形成绝缘材料的第一层，在第一绝缘材料层之上形成第二侧壁隔离层并与衬里层相邻，执行蚀刻工艺以除去第二侧壁间隔物和牺牲栅极盖层， 暴露牺牲栅电极的上表面，去除牺牲栅电极以限定通过衬层至少部分地限定的侧壁的栅极腔，以及在空腔中形成替换栅极结构。
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