公开(公告)号：US20130003439A1

公开(公告)日：2013-01-03

申请号：US13599406

申请日：2012-08-30

申请人： Ryotaro AZUMA ,  Kazuhiko Shimakawa ,  Shunsaku Muraoka ,  Ken Kawai

发明人： Ryotaro AZUMA ,  Kazuhiko Shimakawa ,  Shunsaku Muraoka ,  Ken Kawai

IPC分类号： G11C11/00

CPC分类号： G11C13/0007 ,  G11C13/004 ,  G11C13/0064 ,  G11C13/0069 ,  G11C2013/0054 ,  G11C2013/0073 ,  G11C2013/0083 ,  G11C2013/009 ,  G11C2013/0092 ,  G11C2213/15 ,  G11C2213/32 ,  G11C2213/56 ,  G11C2213/79

摘要： A method of writing data to a variable resistance element (10a) that reversibly changes between a high resistance state and a low resistance state according to a polarity of an applied voltage, as a voltage applied to an upper electrode (11) with respect to a lower electrode (14t): a positive voltage is applied in a high resistance writing step (405) to set the variable resistance element to a high resistance state (401); a negative voltage is applied in a low resistance writing step (406, 408) to set the variable resistance element to a low resistance state (403, 402); and a positive voltage is applied in a low resistance stabilization writing step (404) after the negative voltage is applied in the low resistance writing step, thereby setting the variable resistance element through the low resistance state to the high resistance state.

摘要翻译： 根据施加电压的极性将数据写入可变电阻元件（10a）的方法，该可变电阻元件（10a）根据施加的电压的极性在高电阻状态和低电阻状态之间可逆地变化，作为对上电极（11）相对于 下电极（14t）：在高电阻写入步骤（405）中施加正电压以将可变电阻元件设置为高电阻状态（401）; 在低电阻写入步骤（406,408）中施加负电压以将可变电阻元件设置为低电阻状态（403,402）; 并且在低电阻写入步骤中施加负电压之后，在低电阻稳定写入步骤（404）中施加正电压，从而将可变电阻元件通过低电阻状态设置为高电阻状态。

公开(公告)号：US20110249486A1

公开(公告)日：2011-10-13

申请号：US13165551

申请日：2011-06-21

申请人： Ryotaro AZUMA ,  Kazuhiko Shimakawa ,  Satoru Fujii

发明人： Ryotaro AZUMA ,  Kazuhiko Shimakawa ,  Satoru Fujii

IPC分类号： G11C11/00

CPC分类号： G11C13/003 ,  G11C13/004 ,  G11C13/0069 ,  G11C2013/009 ,  G11C2213/76 ,  H01L27/101 ,  H01L27/1021 ,  H01L27/2409 ,  H01L27/2481 ,  H01L45/04 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/1625

摘要： A resistance variable memory apparatus (100) of the present invention includes a current suppressing element (116) which is connected in series with each resistance variable layer (114) and whose threshold voltage is VF, and is configured to apply a first voltage V1 to a first wire (WL) associated with a selected nonvolatile memory element, apply a second voltage V2 to a second wire (BL) associated with the selected nonvolatile memory element, apply a third voltage V3 to a first wire (WL) which is not associated with the selected nonvolatile memory element and apply a fourth voltage V4 to a second wire (BL) which is not associated with the selected memory element when writing data or reading data, wherein V2≦V3

摘要翻译： 本发明的电阻可变存储装置（100）具有与各个电阻变化层（114）串联连接且阈值电压为VF的电流抑制元件（116），并且将第一电压V1 与所选择的非易失性存储器元件相关联的第一线（WL）将第二电压V2施加到与所选择的非易失性存储器元件相关联的第二线（BL），将第三电压V3施加到不相关联的第一线（WL） 使用所选择的非易失性存储元件，并且在写入数据或读取数据时将第四电压V4施加到与所选择的存储器元件不相关联的第二电线（BL），其中V2＆nlE; V3