公开(公告)号：US20240164094A1

公开(公告)日：2024-05-16

申请号：US18479591

申请日：2023-10-02

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Ji-Sung KIM ,  Jung Min PARK ,  Bong Jin KUH ,  Yong Ho HA

IPC: H10B41/27 ,  H01L21/28 ,  H01L25/065 ,  H01L29/51 ,  H10B41/10 ,  H10B41/35 ,  H10B43/10 ,  H10B43/27 ,  H10B43/35 ,  H10B80/00

CPC classification number: H10B41/27 ,  H01L25/0652 ,  H01L29/40111 ,  H01L29/516 ,  H10B41/10 ,  H10B41/35 ,  H10B43/10 ,  H10B43/27 ,  H10B43/35 ,  H10B80/00 ,  H01L2225/06506

Abstract: A semiconductor memory device comprises, a substrate, a mold structure including gate electrodes and mold insulating films alternately stacked on the substrate, and a channel structure penetrating the mold structure, wherein the channel structure comprises a semiconductor pattern and a dielectric film on the semiconductor pattern, wherein the dielectric film comprises a first crystalline film in contact with the gate electrodes and a second crystalline film between the first crystalline film and the semiconductor pattern, wherein the first crystalline film includes a first matrix and a first impurity and the second crystalline film includes a second matrix and a second impurity, wherein each of the first matrix and the second matrix comprises at least one of HfO2, HfxZr1-xO2 (0.5