公开(公告)号：US20240284101A1

公开(公告)日：2024-08-22

申请号：US18653069

申请日：2024-05-02

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kwangbok PARK ,  Duckjo SON ,  Changjun LEE ,  Yongjoon KIM

IPC: H04R3/04 ,  G06F3/16

CPC classification number: H04R3/04 ,  G06F3/165

Abstract: Disclosed is an electronic device. The electronic device comprises: a speaker; a memory in which filter information for each of a plurality of volume levels is stored for each of characteristic values of a plurality of speakers; and at least one processor, comprising processing circuitry, individually and/or collectively, configured to: obtain filter information for each of the plurality of volume levels corresponding to the characteristic values of the speaker among stored filter information based on characteristic values of the speaker, set a filter based on filter information corresponding to a volume level of the electronic device among the obtained filter information, perform signal processing on an audio signal using the set filter, and control the speaker to output the processed audio signal.

公开(公告)号：US20240152280A1

公开(公告)日：2024-05-09

申请号：US18220489

申请日：2023-07-11

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hyojin AHN ,  Dongwoo SHIN ,  Seongkuk KIM ,  Changjun LEE ,  Sungjun HONG

IPC: G06F3/06 ,  G06F11/10

CPC classification number: G06F3/0619 ,  G06F3/0647 ,  G06F3/0679 ,  G06F11/1008

Abstract: The present disclosure provides methods and apparatuses for programming operating system (OS) data before a surface mount technology (SMT) process. In some embodiments, a method includes erasing a plurality of memory cells in a memory block, classifying word lines coupled to the memory block into first word lines to be programmed with OS data and second word lines to be programmed in a state pattern, programming, with a multi-bit program, the OS data into first memory cells of the plurality of memory cells coupled to the first word lines, and programming second memory cells of the plurality of memory cells coupled to the second word lines to have the state pattern.

公开(公告)号：US20240241648A1

公开(公告)日：2024-07-18

申请号：US18370564

申请日：2023-09-20

Applicant: Samsung Electronics Co., Ltd.

Inventor： Changjun LEE ,  Dayeon KIM ,  Sangwoo KIM ,  Yongjun CHO

IPC: G06F3/06

CPC classification number: G06F3/0619 ,  G06F3/0659 ,  G06F3/0679

Abstract: There is provided a storage device which includes a nonvolatile memory device that includes a first area and a second area, and a controller that receives a first command from an external host device, generates a physical address by performing first error correction decoding on a physical address entry included in the first command, reads first data from the second area of the nonvolatile memory device by using the physical address, and outputs the first data to the external host device. When the first error correction decoding fails, the controller reads first map data from the first area from the nonvolatile memory device, translates a logical address included in the first command into the physical address by using the first map data, reads the first data from the second area of the nonvolatile memory device by using the physical address, and outputs the first data to the external host device.

公开(公告)号：US20240153567A1

公开(公告)日：2024-05-09

申请号：US18209069

申请日：2023-06-13

Applicant: Samsung Electronics Co.,Ltd.

Inventor： Hyojin AHN ,  Seongkuk KIM ,  Dongwoo SHIN ,  Seoyeong LEE ,  Changjun LEE ,  Hoon JO

IPC: G11C16/34 ,  G11C11/56 ,  G11C16/04 ,  G11C16/10 ,  G11C16/16

CPC classification number: G11C16/3409 ,  G11C11/5628 ,  G11C11/5635 ,  G11C11/5671 ,  G11C16/0483 ,  G11C16/10 ,  G11C16/16

Abstract: The present disclosure provides apparatuses and methods for operating a flash memory for programming operating system (OS) data before an surface mount technology (SMT) process. In some embodiments, the method includes erasing a plurality of memory cells in a memory block, reducing a lateral charge loss of the plurality of memory cells due to high temperature degradation during the SMT process by applying a pre-program voltage to word lines coupled to the memory block, and performing multi-bit programming of the OS data in the plurality of memory cells, prior to performing the SMT process. The applying of the pre-program voltage causes threshold voltages of the plurality of memory cells to increase.