公开(公告)号：US11742329B2

公开(公告)日：2023-08-29

申请号：US17399233

申请日：2021-08-11

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jongho Park ,  Kyungsuk Oh ,  Hyunki Kim ,  Yongkwan Lee ,  Sangsoo Kim ,  Seungkon Mok ,  Junyoung Oh ,  Changyoung Yoo

IPC: H01L23/16 ,  H01L25/065 ,  H01L23/00 ,  H01L23/31 ,  H01L23/498

CPC classification number: H01L25/0657 ,  H01L23/16 ,  H01L23/3185 ,  H01L23/49811 ,  H01L24/16 ,  H01L24/48 ,  H01L2224/16227 ,  H01L2224/48227

Abstract: A semiconductor package including a circuit substrate including a plurality of interconnections; a first chip on the circuit substrate; a second chip stacked on the first chip; a plurality of first pads on the circuit substrate, the plurality of first pads overlapping the first chip; a plurality of bumps between the circuit substrate and the first chip; a plurality of second pads on an edge portion of a first side of the circuit substrate, the plurality of second pads electrically connected to the second chip through a conductive wire; an underfill that fills a space between the circuit substrate and the first chip; and a first dam on the circuit substrate, the first dam overlapping the first chip. The first dam includes a conductive material and overlaps at least one of the plurality of interconnections.

公开(公告)号：US20200350288A1

公开(公告)日：2020-11-05

申请号：US16680657

申请日：2019-11-12

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jongho PARK ,  Kyungsuk Oh ,  Hyunki Kim ,  Yongkwan Lee ,  Sangsoo Kim ,  Seungkon Mok ,  Junyoung Oh ,  Changyoung Yoo

IPC: H01L25/065 ,  H01L23/498 ,  H01L23/00 ,  H01L23/31 ,  H01L23/16

Abstract: A semiconductor package including a circuit substrate including a plurality of interconnections; a first chip on the circuit substrate; a second chip stacked on the first chip; a plurality of first pads on the circuit substrate, the plurality of first pads overlapping the first chip; a plurality of bumps between the circuit substrate and the first chip; a plurality of second pads on an edge portion of a first side of the circuit substrate, the plurality of second pads electrically connected to the second chip through a conductive wire; an underfill that fills a space between the circuit substrate and the first chip; and a first dam on the circuit substrate, the first dam overlapping the first chip. The first dam includes a conductive material and overlaps at least one of the plurality of interconnections.

公开(公告)号：US11101243B2

公开(公告)日：2021-08-24

申请号：US16680657

申请日：2019-11-12

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jongho Park ,  Kyungsuk Oh ,  Hyunki Kim ,  Yongkwan Lee ,  Sangsoo Kim ,  Seungkon Mok ,  Junyoung Oh ,  Changyoung Yoo

IPC: H01L25/065 ,  H01L23/16 ,  H01L23/00 ,  H01L23/31 ,  H01L23/498

Abstract: A semiconductor package including a circuit substrate including a plurality of interconnections; a first chip on the circuit substrate; a second chip stacked on the first chip; a plurality of first pads on the circuit substrate, the plurality of first pads overlapping the first chip; a plurality of bumps between the circuit substrate and the first chip; a plurality of second pads on an edge portion of a first side of the circuit substrate, the plurality of second pads electrically connected to the second chip through a conductive wire; an underfill that fills a space between the circuit substrate and the first chip; and a first dam on the circuit substrate, the first dam overlapping the first chip. The first dam includes a conductive material and overlaps at least one of the plurality of interconnections.