公开(公告)号：US20170372906A1

公开(公告)日：2017-12-28

申请号：US15409813

申请日：2017-01-19

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yun Kyeong JANG ,  Sang Jin KIM ,  Dong Woon PARK ,  Joon Soo PARK ,  Chang Jae YANG ,  Kwang Sub YOON ,  Hye Kyoung JUE

IPC: H01L21/28 ,  H01L21/033 ,  H01L21/8234

CPC classification number: H01L21/28123 ,  H01L21/0337 ,  H01L21/28132 ,  H01L21/32139 ,  H01L21/823431 ,  H01L21/823456

Abstract: A method for fabricating a semiconductor device includes stacking a semiconductor layer, a first sacrificial layer, and a second sacrificial layer, patterning the second sacrificial layer to form a second sacrificial pattern, forming a spacer pattern on both sides of the second sacrificial pattern, wherein a pitch of the spacer pattern is constant, and a width of the spacer pattern is constant, removing the second sacrificial pattern, forming a mask layer that covers the spacer pattern, forming a supporting pattern on the mask layer, wherein a width of the supporting pattern is greater than a width of the spacer pattern, and the supporting pattern is overlapped with the spacer pattern, transferring the supporting pattern and the spacer pattern onto the first sacrificial layer to form gate and supporting patterns, and transferring the gate and supporting patterns onto the semiconductor layer to form a gate and a supporting gate.