公开(公告)号：US11570384B2

公开(公告)日：2023-01-31

申请号：US17011227

申请日：2020-09-03

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Shahaf Duenyas ,  Yoel Yaffe ,  Guy Horowitz ,  Amit Eisenberg ,  Shy Hamami ,  Oded Monzon ,  Gal Bitan ,  Yoav Piepsh

IPC: H04N5/341 ,  H04N5/343 ,  H04N5/347

Abstract: A method performed with an image sensor having a pixel array. At least one frame of a scene may be obtained using the pixel array. At least one region of interest (ROI) is identified within the frame. Subsequent frames of the scene are obtained, which involves controlling the pixel array to perform high resolution imaging with respect to the at least one ROI and low resolution imaging using analog binning with respect to remaining regions of the frames.

公开(公告)号：US20220070391A1

公开(公告)日：2022-03-03

申请号：US17011227

申请日：2020-09-03

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： SHAHAF DUENYAS ,  Yoel Yaffe ,  Guy Horowitz ,  Amit Eisenberg ,  Shy Hamami ,  Oded Monzon ,  Gal Bitan ,  Yoav Piepsh

IPC: H04N5/343 ,  H04N5/347

Abstract: A method performed with an image sensor having a pixel array. At least one frame of a scene may be obtained using the pixel array. At least one region of interest (ROI) is identified within the frame. Subsequent frames of the scene are obtained, which involves controlling the pixel array to perform high resolution imaging with respect to the at least one ROI and low resolution imaging using analog binning with respect to remaining regions of the frames.

公开(公告)号：US11995012B2

公开(公告)日：2024-05-28

申请号：US17695204

申请日：2022-03-15

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Avi Klein ,  Dror Barash ,  Guy Horowitz ,  Oren Reinherz ,  Roi Herman ,  Amit Eisenberg

IPC: G06F13/24 ,  G02B27/01 ,  G06F13/364 ,  G06F13/42 ,  H04N13/243 ,  H04N13/296

CPC classification number: G06F13/24 ,  G02B27/017 ,  G06F13/364 ,  G06F13/4256 ,  G06F13/4291 ,  H04N13/243 ,  H04N13/296 ,  G02B2027/0178

Abstract: A multi-image sensor system includes data, clock, and control buses, an application processor connected to the data bus and the clock bus, and image sensors connected in a daisy chain using the control bus. A first one of the image sensors configured as a master outputs image data to the data bus, outputs a first clock signal to the clock bus, and sends a control signal to a second one of the image sensors in the daisy chain through the control bus. The control signal has a first logic state when output of the first image data starts and a second other logic state when output of the first image data ends. The second image sensor connects itself to the data bus and the master disconnects itself from the data bus according to a state of the first control signal.