公开(公告)号：US20220165680A1

公开(公告)日：2022-05-26

申请号：US17501008

申请日：2021-10-14

申请人： SAMSUNG ELECTRONICS CO., LTD.

发明人： DONG HO KIM ,  JI HWANG KIM ,  HWAN PIL PARK ,  JONG BO SHIM

IPC分类号： H01L23/552 ,  H01L23/498 ,  H01L23/42 ,  H01L21/48 ,  H01L21/56

摘要： A semiconductor package includes a first substrate that includes a first insulating layer, a ground pattern in the first insulating layer, and a first conductive pattern; a first semiconductor chip placed on an upper surface of the first substrate; a ball array structure that is placed on the upper surface of the first substrate along a perimeter of the first semiconductor chip and is electrically connected to the ground pattern; and a shielding structure placed on the upper surface of the first semiconductor chip and in contact with the upper surface of the ball array structure. The ball array structure has a closed loop shape, and includes a solder ball portion and a connecting portion that connects adjacent solder ball portions. A maximum width of the solder ball portion is greater than a width of the connecting portion in a direction perpendicular to an extension direction of the connecting portion.

公开(公告)号：US20220352130A1

公开(公告)日：2022-11-03

申请号：US17710830

申请日：2022-03-31

申请人： SAMSUNG ELECTRONICS CO., LTD.

发明人： JEONG HYUN LEE ,  HWAN PIL PARK ,  JONG BO SHIM

IPC分类号： H01L25/16 ,  H01L23/00 ,  H01L23/48 ,  H01L23/498 ,  H01L21/48

摘要： A semiconductor package includes; a substrate including a first insulating layer and a first conductive pattern in the first insulating layer, a first semiconductor chip on the substrate, an interposer spaced apart from the first semiconductor chip in a direction perpendicular to an upper surface of the substrate and including a second insulating layer and a second conductive pattern in the second insulating layer, a first element between the first semiconductor chip and the interposer, a connection member between the substrate and the interposer, and a mold layer covering side surfaces of the first semiconductor chip and side surfaces of the first element.

公开(公告)号：US20210407923A1

公开(公告)日：2021-12-30

申请号：US17167789

申请日：2021-02-04

申请人： SAMSUNG ELECTRONICS CO., LTD.

发明人： DONGHO KIM ,  JONGBO SHIM ,  HWAN PIL PARK ,  CHOONGBIN YIM ,  JUNGWOO KIM

IPC分类号： H01L23/538 ,  H01L23/13 ,  H01L23/31 ,  H01L23/00 ,  H01L25/065 ,  H01L25/10

摘要： A semiconductor package substrate includes a substrate having a bottom surface including a cavity structure defined therein. The cavity structure includes a floor surface. A passive device structure has at least a partial portion of the passive device structure disposed in the cavity structure. The passive device structure includes a first passive device and a second passive device that are each electrically connected to the floor surface of the cavity structure. At least partial portions of the first passive device and the second passive device vertically overlap each other.