公开(公告)号：US20240420794A1

公开(公告)日：2024-12-19

申请号：US18624904

申请日：2024-04-02

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Youhwan Kim ,  Sewoong Lee ,  Haedong No ,  Ho-Sung Ahn ,  Youn-Soo Cheon

IPC: G11C29/52 ,  G11C16/08 ,  G11C29/50

Abstract: A non-volatile memory device comprises a memory cell array comprising a plurality of memory cell blocks; and an address decoder connected to the memory cell array through a plurality of word lines and configured to apply a read pass voltage to unselected word lines of a selected memory cell block among the plurality of memory cell blocks and apply the read pass voltages of different levels to different memory cell blocks among the plurality of memory cell blocks.

公开(公告)号：US11887684B2

公开(公告)日：2024-01-30

申请号：US17488989

申请日：2021-09-29

Applicant: Samsung Electronics Co., Ltd.

Inventor： Haedong No ,  Youjin Jeon ,  Hyeji Yun ,  Jongtaek Seong ,  Jungeol Baek ,  Youn-Soo Cheon

IPC: G11C16/26 ,  G11C29/42 ,  G11C29/44 ,  G11C16/34 ,  G06N20/00 ,  G11C16/30 ,  G11C16/10

CPC classification number: G11C29/42 ,  G06N20/00 ,  G11C16/102 ,  G11C16/26 ,  G11C16/30 ,  G11C16/3404 ,  G11C16/3495 ,  G11C29/4401

Abstract: A storage device includes a nonvolatile memory device and a memory controller. An operating method of the storage device includes sending, at the memory controller, a first read command and first offset information to the nonvolatile memory device, performing, at the nonvolatile memory device, first read operations based on the first read command and the first offset information, sending, at the nonvolatile memory device, a result of the first read operations as first data to the memory controller, sending, at the memory controller, a second read command, read voltage levels, and second offset information to the nonvolatile memory device, performing, at the nonvolatile memory device, second read operations based on the second read command, the read level information, and the second offset information, and sending, at the nonvolatile memory device, results of the second read operations as second data to the memory controller.