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公开(公告)号:US20240420794A1
公开(公告)日:2024-12-19
申请号:US18624904
申请日:2024-04-02
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Youhwan Kim , Sewoong Lee , Haedong No , Ho-Sung Ahn , Youn-Soo Cheon
Abstract: A non-volatile memory device comprises a memory cell array comprising a plurality of memory cell blocks; and an address decoder connected to the memory cell array through a plurality of word lines and configured to apply a read pass voltage to unselected word lines of a selected memory cell block among the plurality of memory cell blocks and apply the read pass voltages of different levels to different memory cell blocks among the plurality of memory cell blocks.
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公开(公告)号:US20240012703A1
公开(公告)日:2024-01-11
申请号:US18134096
申请日:2023-04-13
Applicant: Samsung Electronics Co., Ltd.
Inventor: Kyungduk Lee , Youn-Soo Cheon
IPC: G06F11/07
CPC classification number: G06F11/076 , G06F11/0793 , G06F11/073
Abstract: An operating method of a storage controller which is configured to communicate with a host and with a non-volatile memory device. The method may include: generating an error count by counting a number of first-type error bits of a target super block of the non-volatile memory device, determining whether the error count exceeds a first reference value, fetching setting data from a latch unit of the non-volatile memory device, based on determining that the error count exceeds the first reference value, determining whether reference setting data of a setting table matches the fetched setting data, the reference setting data indicating information about a designed operating environment of the non-volatile memory device, and providing a reset request to the latch unit, based on determining that the reference setting data does not match the fetched setting data.
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3.
公开(公告)号:US11699485B2
公开(公告)日:2023-07-11
申请号:US17408414
申请日:2021-08-21
Applicant: Samsung Electronics Co., Ltd.
Inventor: Ho-Sung Ahn , Youn-Soo Cheon
CPC classification number: G11C11/5628 , G06F3/0604 , G06F3/0659 , G06F3/0673 , G11C11/5635 , G11C11/5671 , G11C16/0483 , G11C16/10 , G11C16/14 , G11C16/30
Abstract: Provided herein are a nonvolatile memory device and a method of programming the same. The nonvolatile memory device includes a memory cell array including a plurality of word lines having a first word line and a plurality of memory cells connected to the first word line. The plurality of memory cells includes a plurality of monitoring cells and a plurality of data cells each data cell configured to store N-bit data, N being a natural number. The nonvolatile memory device is configured to perform a first program on the plurality of data cells and a detection program different from the first program on the one or more monitoring cells after performing the first program.
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公开(公告)号:US12229418B2
公开(公告)日:2025-02-18
申请号:US18101232
申请日:2023-01-25
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Kyungduk Lee , Youn-Soo Cheon , Daehyeon Jo
Abstract: Provided is a method for operating a memory device including performing a first setting operation on a first operation, reading map data based on the first setting operation, and performing a second setting operation on a second operation.
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5.
公开(公告)号:US20240071449A1
公开(公告)日:2024-02-29
申请号:US18322725
申请日:2023-05-24
Applicant: Samsung Electronics Co., Ltd.
Inventor: You Hwan Kim , Kyung Duk Lee , Ho-Sung Ahn , Youn-Soo Cheon
CPC classification number: G11C7/24 , G11C7/1087 , G11C7/1096
Abstract: A storage device, a non-volatile memory device, and a method of operating the non-volatile memory device are provided. The storage device includes a storage controller configured to send a command and program data including a pattern of one or more bits, a non-volatile memory device configured to receive the command and the program data, and a pattern monitoring circuit configured to monitor a pattern of the program data sent from the storage controller. The pattern monitoring circuit is configured to send an abnormal status check bit to the storage controller when the program data includes repeated patterns that are repeated a preset number of times or more, and the storage controller is configured to resend the program data to the non-volatile memory device in response to receiving the abnormal status check bit.
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公开(公告)号:US20240071545A1
公开(公告)日:2024-02-29
申请号:US18302034
申请日:2023-04-18
Applicant: Samsung Electronics Co., Ltd.
Inventor: Seungjun Oh , Seong Geon Lee , Dae-Won Kim , Kyungduk Lee , Youn-Soo Cheon
CPC classification number: G11C29/12005 , G11C29/42 , G11C2029/1202
Abstract: A method of operating a memory device includes reading a first page of memory cells containing at least one worn-out memory cell therein using a read voltage, from a first memory block, and reading a second page of memory cells, which extends adjacent to the first page in the first memory block, using the read voltage. An operation is performed to determine a match rate between a position of a column including a “0” bit in the first page with a position of a column including a “0” bit in the second page. Thereafter, the second page is read by adjusting a read pass voltage applied to a word line of another page in the first memory block, when the match rate exceeds a threshold match rate.
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公开(公告)号:US11887684B2
公开(公告)日:2024-01-30
申请号:US17488989
申请日:2021-09-29
Applicant: Samsung Electronics Co., Ltd.
Inventor: Haedong No , Youjin Jeon , Hyeji Yun , Jongtaek Seong , Jungeol Baek , Youn-Soo Cheon
CPC classification number: G11C29/42 , G06N20/00 , G11C16/102 , G11C16/26 , G11C16/30 , G11C16/3404 , G11C16/3495 , G11C29/4401
Abstract: A storage device includes a nonvolatile memory device and a memory controller. An operating method of the storage device includes sending, at the memory controller, a first read command and first offset information to the nonvolatile memory device, performing, at the nonvolatile memory device, first read operations based on the first read command and the first offset information, sending, at the nonvolatile memory device, a result of the first read operations as first data to the memory controller, sending, at the memory controller, a second read command, read voltage levels, and second offset information to the nonvolatile memory device, performing, at the nonvolatile memory device, second read operations based on the second read command, the read level information, and the second offset information, and sending, at the nonvolatile memory device, results of the second read operations as second data to the memory controller.
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8.
公开(公告)号:US20230402120A1
公开(公告)日:2023-12-14
申请号:US18132472
申请日:2023-04-10
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: KYUNGDUK LEE , Ho-Sung Ahn , Youn-Soo Cheon
CPC classification number: G11C29/022 , G11C29/52
Abstract: A data storage device including: a memory device including a plurality of memory blocks; and a memory controller configured to control the memory device, wherein the plurality of memory blocks are connected with row lines, wherein the row lines include word lines, wherein the memory controller is further configured to: check whether a resistive defect occurs at the row lines except for the word lines; and set a program operation time of a memory block corresponding to a row line, at which the resistive defect occurs, to be longer than a program operation time of the other memory blocks.
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9.
公开(公告)号:US11550503B2
公开(公告)日:2023-01-10
申请号:US16899968
申请日:2020-06-12
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Sang-Ryong Park , Soo-Woong Lee , Youn-Soo Cheon
IPC: G06F3/06 , G01K13/00 , G06F9/4401 , G01K3/00
Abstract: A storage device includes a memory and a memory controller which transmits a command to the memory. The memory includes at least one memory cell array, a memory temperature sensor which measures a temperature of the memory, and a control logic. The control logic outputs a busy signal in response to the command, receives the temperature of the memory from the memory temperature sensor in response to the command, and determines whether to perform a command operation according to the command on the memory cell array based on the received temperature of the memory.
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10.
公开(公告)号:US11127456B2
公开(公告)日:2021-09-21
申请号:US16746413
申请日:2020-01-17
Applicant: Samsung Electronics Co., Ltd.
Inventor: Ho-Sung Ahn , Youn-Soo Cheon
Abstract: Provided herein are a nonvolatile memory device and a method of programming the same. The nonvolatile memory device includes a memory cell array including a plurality of word lines having a first word line and a plurality of memory cells connected to the first word line. The plurality of memory cells includes a plurality of monitoring cells and a plurality of data cells each data cell configured to store N-bit data, N being a natural number. The nonvolatile memory device is configured to perform a first program on the plurality of data cells and a detection program different from the first program on the one or more monitoring cells after performing the first program.
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