Voltage doubler and nonvolating memory device having the same
    1.
    发明授权
    Voltage doubler and nonvolating memory device having the same 有权
    具有相同的倍压器和非挥发性存储器件

    公开(公告)号:US09369115B2

    公开(公告)日:2016-06-14

    申请号:US14637670

    申请日:2015-03-04

    Abstract: A voltage doubler includes first to fourth transistors, a first capacitor connected between a first node and a first clock terminal configured to receive a first clock signal. A second capacitor is connected between a second node and a second clock terminal configured to receive an inverted first clock signal. A first gate control unit is configured to control the first and second transistors using the first clock signal and the inverted first clock signal, and a second gate control unit is configured to control the third and fourth transistors using a second clock signal and an inverted second clock signal. A load capacitor is connected between the output terminal and a ground terminal.

    Abstract translation: 电压倍增器包括第一至第四晶体管,连接在第一节点和被配置为接收第一时钟信号的第一时钟端子之间的第一电容器。 第二电容器连接在第二节点和被配置为接收反相第一时钟信号的第二时钟端子之间。 第一栅极控制单元被配置为使用第一时钟信号和反相的第一时钟信号来控制第一和第二晶体管,并且第二栅极控制单元被配置为使用第二时钟信号和反相的第二时钟信号来控制第三和第四晶体管 时钟信号。 负载电容连接在输出端子和接地端子之间。

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