公开(公告)号：US10902926B2

公开(公告)日：2021-01-26

申请号：US16675914

申请日：2019-11-06

Applicant: Samsung Electronics Co., Ltd.

Inventor： Young-sun Min ,  Vivek Venkata Kalluru ,  Tae-hong Kwon ,  Ki-won Kim ,  Sung-whan Seo ,  Bilal Ahmad Janjua

IPC: G11C16/04 ,  G11C16/30 ,  H02M3/07 ,  G11C16/26 ,  G11C16/10 ,  G11C11/56

Abstract: A charge pump includes: a charging unit including a first n-type transistor connected between an input terminal configured to receive an input voltage and a first node, a second n-type transistor connected between the input terminal and a second node, a first gate control element configured to control the first n-type transistor based on a first clock signal and a second gate control element configured to control the second n-type transistor based on a second clock signal having a phase opposite to the first clock signal; a first pumping capacitor including one end connected to the first node and an other end configured to receive the first clock signal; a second pumping capacitor including one end connected to the second node and an other end configured to receive the second clock signal; and an output unit.

公开(公告)号：US09369115B2

公开(公告)日：2016-06-14

申请号：US14637670

申请日：2015-03-04

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Vivek Venkata Kalluru ,  Youngsun Min ,  Hichoon Lee

IPC: G11C16/00 ,  H03K5/02 ,  G11C16/04 ,  G11C16/08 ,  G11C16/26 ,  G11C16/32

CPC classification number: H03K5/023 ,  G11C5/145 ,  G11C13/0038 ,  G11C16/0466 ,  G11C16/0483 ,  G11C16/08 ,  G11C16/26 ,  G11C16/30 ,  G11C16/32 ,  Y10T29/49169

Abstract: A voltage doubler includes first to fourth transistors, a first capacitor connected between a first node and a first clock terminal configured to receive a first clock signal. A second capacitor is connected between a second node and a second clock terminal configured to receive an inverted first clock signal. A first gate control unit is configured to control the first and second transistors using the first clock signal and the inverted first clock signal, and a second gate control unit is configured to control the third and fourth transistors using a second clock signal and an inverted second clock signal. A load capacitor is connected between the output terminal and a ground terminal.

Abstract translation: 电压倍增器包括第一至第四晶体管，连接在第一节点和被配置为接收第一时钟信号的第一时钟端子之间的第一电容器。 第二电容器连接在第二节点和被配置为接收反相第一时钟信号的第二时钟端子之间。 第一栅极控制单元被配置为使用第一时钟信号和反相的第一时钟信号来控制第一和第二晶体管，并且第二栅极控制单元被配置为使用第二时钟信号和反相的第二时钟信号来控制第三和第四晶体管 时钟信号。 负载电容连接在输出端子和接地端子之间。

公开(公告)号：US09685238B2

公开(公告)日：2017-06-20

申请号：US15132525

申请日：2016-04-19

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Venkataramana Gangasani ,  Sung-Whan Seo ,  Hi-Choon Lee ,  Vivek Venkata Kalluru

IPC: G11C5/14 ,  G11C16/30 ,  H03K5/156 ,  H03K5/24 ,  H03K3/037

CPC classification number: G11C16/30 ,  G11C7/04 ,  G11C7/222 ,  G11C16/0483 ,  G11C16/32 ,  H03K3/011 ,  H03K3/0231 ,  H03K3/037 ,  H03K5/1565 ,  H03K5/24

Abstract: A clock signal generation device includes a variable voltage providing circuit, a fixed voltage providing circuit and a clock signal generating circuit. The variable voltage providing circuit provides a variable reference voltage based on a selection signal, a reference voltage and a temperature coefficient. The variable reference voltage is varied according to temperature. The fixed voltage providing circuit provides a fixed reference voltage that is determined according to the selection signal. The fixed reference voltage is a constant voltage. The clock signal generating circuit provides a clock signal based on the fixed reference voltage and the variable reference voltage. The performance of the clock signal generation device may be increased by providing the clock signal based on the variable reference voltage that is varied according to the temperature and based on the fixed reference voltage.

公开(公告)号：US11056197B2

公开(公告)日：2021-07-06

申请号：US16947413

申请日：2020-07-31

Applicant: Samsung Electronics Co., Ltd.

Inventor： Young-sun Min ,  Vivek Venkata Kalluru ,  Tae-hong Kwon ,  Ki-won Kim ,  Sung-whan Seo ,  Bilal Ahmad Janjua

IPC: G11C16/04 ,  G11C16/30 ,  H02M3/07 ,  G11C16/10 ,  G11C16/26

Abstract: A charge pump includes: a charging unit including a first n-type transistor connected between an input terminal configured to receive an input voltage and a first node, a second n-type transistor connected between the input terminal and a second node, a first gate control element configured to control the first n-type transistor based on a first clock signal and a second gate control element configured to control the second n-type transistor based on a second clock signal having a phase opposite to the first clock signal; a first pumping capacitor including one end connected to the first node and an other end configured to receive the first clock signal; a second pumping capacitor including one end connected to the second node and an other end configured to receive the second clock signal; and an output unit.

公开(公告)号：US10707751B2

公开(公告)日：2020-07-07

申请号：US16550191

申请日：2019-08-24

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Bilal Ahmad Janjua ,  Sungwhan Seo ,  Vivek Venkata Kalluru

IPC: H02M3/07 ,  G05F3/02 ,  G11C5/14

Abstract: An electronic circuit includes a first switch circuit, a second switch circuit, a pumping circuit, and a main charge pump. The first switch circuit transfers a first driving voltage to a first node based on a first clock. The second switch circuit transfers a second driving voltage to a second node based on the first driving voltage of the first node. The pumping circuit outputs a pumping voltage having a level corresponding to a sum of a level of the second driving voltage and a first operation level of a second clock, based on the second driving voltage of the second node and the first operation level. The main charge pump converts an input voltage based on the pumping voltage.