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公开(公告)号：US09554073B2
公开(公告)日：2017-01-24
申请号：US14488637
申请日：2014-09-17
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Eun-Young Jin , Kyo-Jin Choo , Yu-Jin Park , Han-Kook Cho
CPC classification number: H04N5/378 , H04N5/3355
Abstract: An integrated circuit comprises a first signal transfer block comprising first through (M)-th aligning blocks that are cascade-coupled to produce first aligned control signals through (M)-th aligned control signals, respectively, by aligning first control signals with a clock signal, wherein M is an integer greater than one, and a functional block divided into first through (M)-th sub-functional blocks configured to perform a same function in parallel, each of the first through (M)-th sub-functional blocks operating according to corresponding ones of the first aligned control signals through (M)-th aligned control signals generated by the first through (M)-th aligning blocks.
Abstract translation: 集成电路包括第一信号传输块，其包括通过（M）第一对准块级联耦合以分别通过（M）对准的控制信号产生第一对准的控制信号，通过将第一控制信号与时钟 信号，其中M是大于1的整数，以及分配成并行执行相同功能的第一至第（M）个子功能块的功能块，第一至第（M）个子功能 根据由第一到第（M）个对准块产生的（M）对准的控制信号，根据第一对准的控制信号中的相应的一个控制信号进行操作。
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Patent Agency Ranking
公开(公告)号：US09509925B2
公开(公告)日：2016-11-29
申请号：US14589216
申请日：2015-01-05
Applicant: Samsung Electronics Co., Ltd.
Inventor： Kyojin David Choo , Eun-Young Jin , Seung-Hyun Lim
CPC classification number: H04N5/3355 , H03M1/145 , H04N5/3692 , H04N5/3698 , H04N5/374
Abstract: An image sensor is provided. The image sensor includes a converter configured to convert a photoelectric converted analog signal in a unit pixel into a digital signal including a plurality of bits, a data transfer unit configured to selectively output the converted digital signal output from the converter in units of bits in response to a control signal, and including a plurality of switching circuits which are serially connected; and a memory configured to store data output from the data transfer unit.
Abstract translation: 提供图像传感器。 图像传感器包括：转换器，被配置为将单位像素中的光电转换模拟信号转换为包括多个位的数字信号;数据传送单元，被配置为以响应位为单位选择性地输出从转换器输出的转换的数字信号 控制信号，并且包括串联连接的多个开关电路; 以及被配置为存储从数据传送单元输出的数据的存储器。
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公开(公告)号：US11658853B2
公开(公告)日：2023-05-23
申请号：US17680583
申请日：2022-02-25
Applicant: Samsung Electronics Co., Ltd.
Inventor： Younghwan Chang , Eun-Young Jin , Youngseo Kim , Kilhoon Lee , Hyunwook Lim , Seng-Sub Chun
Abstract: An operation method of a receiver, which includes setting a coefficient of an equalizer based on one of a plurality of first codes, setting a coefficient of an amplifier based on one of a plurality of second codes, performing offset calibration by driving the equalizer and the amplifier based on the coefficient of the equalizer and the coefficient of the amplifier, storing an offset code corresponding to a voltage offset generated when the equalizer and the amplifier are driven, determining whether the offset calibration is completed, performing a normal operation of obtaining reception data from an input signal, in response to determining that the offset calibration is completed, and removing the voltage offset based on the offset code, in the normal operation.
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公开(公告)号：US09959835B2
公开(公告)日：2018-05-01
申请号：US15271837
申请日：2016-09-21
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Dong-Hoon Baek , Hyunwook Lim , Kwi Sung Yoo , Eun-Young Jin , Kyongho Kim , JaeYoul Lee , Youngmin Choi
CPC classification number: G09G5/008 , G09G3/2096 , G09G2310/027 , G09G2330/10 , G09G2370/10 , G09G2370/16 , H03L7/0807 , H03L7/0891 , H03L7/095
Abstract: A clock and data recovery circuit in accordance with an embodiment of the inventive concept includes a phase locked loop configured to receive a data stream into which an additional bit is inserted at every reference period to generate parallelized data and a clock signal, and a first detector circuit configured to determine whether the parallelized data is locked based on a bit-conversion of the data stream according to an insertion of the additional bit. The bit-conversion is executed with respect to the additional bits according to a predetermined protocol, or is executed with respect to at least one bit from among data of the data stream between a current one of the additional bits and a next one of the additional bits.
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5.发明授权公开(公告)号：US10141963B2
公开(公告)日：2018-11-27
申请号：US15266505
申请日：2016-09-15
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Kwi-Sung Yoo , Jae-Youl Lee , Hyun-Wook Lim , Young-Min Choi , Dong-Hoon Baek , Kyong-Ho Kim , Eun-Young Jin
Abstract: A method of operating a receiver includes a controller of the receiver determining whether a full initialization or a partial initialization of the receiver is needed; the controller adjusting alternating current (AC) characteristics and direct current (DC) characteristics of the receiver in a full initialization mode, and the controller adjusting the DC characteristics of the receiver in a partial initialization mode when the controller determines the partial initialization is needed.
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公开(公告)号：US09521345B2
公开(公告)日：2016-12-13
申请号：US14559854
申请日：2014-12-03
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Eun-Young Jin , Hyuk-Bin Kwon , Dae-Hwa Paik , Chang-Eun Kang , Won-Ho Choi , Young-Tae Jang , Ji-Hun Shin , Young-Kyun Jeong
CPC classification number: H04N5/378 , H04N5/3765
Abstract: A data transmission circuit includes a data output unit (DOU) connected to a positive data transmission line and a negative data transmission line. The DOU generates a recovered data signal based on data signals communicated via the positive and negative data transmission lines. Data signal driving units are respectively connected at different points along the positive and negative data transmission lines, where each data signal driving unit generates and provides a positive data signal and a negative data signal based on a data input signal and a data transmission distance between the data signal driving unit and the data output unit.
Abstract translation: 数据传输电路包括连接到正数据传输线和负数据传输线的数据输出单元（DOU）。 DOU根据通过正和负数据传输线传送的数据信号产生恢复的数据信号。 数据信号驱动单元分别连接在正负数据传输线的不同点，其中每个数据信号驱动单元基于数据输入信号产生正数据信号和负数据信号，并且提供数据信号驱动单元之间的数据传输距离 数据信号驱动单元和数据输出单元。
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