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公开(公告)号：US11349738B2
公开(公告)日：2022-05-31
申请号：US16886315
申请日：2020-05-28
Applicant: Samsung Electronics Co., Ltd.
Inventor： Jae Geun Yun , Seong Min Jo , Yun Kyo Cho , Byeong Jin Kim , Dong Soo Kang , Nak Hee Seong
IPC: G06F11/30 , H04L43/0852 , H04L43/0876 , H04L41/06
Abstract: A semiconductor device and an operating method thereof are provided. An operating method of a semiconductor device, includes monitoring a plurality of request packets and a plurality of response packets that are being transmitted between a master device and a slave device; detecting a target request packet that matches desired identification (ID) information from among the plurality of request packets; counting the number of events of a transaction including the target request packet by using an event counter; counting the number of request packets whose corresponding response packets are yet to be detected, from among the plurality of request packets by using a Multiple Outstanding (MO) counter; determining whether an MO count value of the MO counter is valid; and if the MO count value is invalid, resetting the event counter.
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2.发明授权公开(公告)号：US10579564B2
公开(公告)日：2020-03-03
申请号：US16273621
申请日：2019-02-12
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Jun Hee Yoo , Jae Geun Yun , Bub Chul Jeong , Dong Soo Kang , Kyeo Rae Lee , Seong Min Jo
IPC: G06F13/00 , G06F13/368 , G06F13/40 , G06F13/16
Abstract: A system on chip (SoC) is present that includes a plurality of master interfaces, a plurality of slave interfaces, and an interface circuit which is connected between the plurality of master interfaces and the plurality of slave interfaces and includes a plurality of components. When a first master interface among the plurality of master interfaces and a first slave interface among the plurality of slave interfaces are paired, a first group of the components which forms a first signal path between the first master interface and the first slave interface among the plurality of components is enabled according to a control of the first master interface.
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公开(公告)号：US11652718B2
公开(公告)日：2023-05-16
申请号：US17743579
申请日：2022-05-13
Applicant: Samsung Electronics Co., Ltd.
Inventor： Jae Geun Yun , Seong Min Jo , Yun Kyo Cho , Byeong Jin Kim , Dong Soo Kang , Nak Hee Seong
IPC: G06F30/35 , H04L43/0852 , H04L43/0876 , H04L41/06
CPC classification number: H04L43/0858 , H04L41/06 , H04L43/0876
Abstract: A semiconductor device and an operating method thereof are provided. An operating method of a semiconductor device, includes monitoring a plurality of request packets and a plurality of response packets that are being transmitted between a master device and a slave device; detecting a target request packet that matches desired identification (ID) information from among the plurality of request packets; counting the number of events of a transaction including the target request packet by using an event counter; counting the number of request packets whose corresponding response packets are yet to be detected, from among the plurality of request packets by using a Multiple Outstanding (MO) counter; determining whether an MO count value of the MO counter is valid; and if the MO count value is invalid, resetting the event counter.
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4.发明授权公开(公告)号：US09122802B2
公开(公告)日：2015-09-01
申请号：US14217536
申请日：2014-03-18
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Joon-Woo Cho , Jong Ho Roh , Jae Geun Yun , Sung-Min Hong
CPC classification number: G06F13/368 , G06F12/0607 , G06F13/4022
Abstract: Provided are an interconnect, a bus system with interconnect, and bus system operating method. The bus system includes a master, slaves access by the master, and an interconnect. The interconnect connects the master with the slaves in response to selection bits identified in a master address provided by the master.
Abstract translation: 提供互连，具有互连的总线系统和总线系统操作方法。 总线系统包括主站，主站的从站访问和互连。 响应于由主机提供的主地址中标识的选择位，互连将主机与从机连接。
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5.发明授权公开(公告)号：US10229079B2
公开(公告)日：2019-03-12
申请号：US15989539
申请日：2018-05-25
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Jun Hee Yoo , Jae Geun Yun , Bub Chul Jeong , Dong Soo Kang , Kyeo Rae Lee , Seong Min Jo
IPC: G06F13/368 , G06F13/40 , G06F13/00 , G06F13/16
Abstract: A system on chip (SoC) is present that includes a plurality of master interfaces, a plurality of slave interfaces, and an interface circuit which is connected between the plurality of master interfaces and the plurality of slave interfaces and includes a plurality of components. When a first master interface among the plurality of master interfaces and a first slave interface among the plurality of slave interfaces are paired, a first group of the components which forms a first signal path between the first master interface and the first slave interface among the plurality of components is enabled according to a control of the first master interface.
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Patent Agency Ranking
公开(公告)号：US10680923B2
公开(公告)日：2020-06-09
申请号：US15427522
申请日：2017-02-08
Applicant: Samsung Electronics Co., Ltd.
Inventor： Jae Geun Yun , Seong Min Jo , Yun Kyo Cho , Byeong Jin Kim , Dong Soo Kang , Nak Hee Seong
Abstract: A semiconductor device and an operating method thereof are provided. An operating method of a semiconductor device, includes monitoring a plurality of request packets and a plurality of response packets that are being transmitted between a master device and a slave device; detecting a target request packet that matches desired identification (ID) information from among the plurality of request packets; counting the number of events of a transaction including the target request packet by using an event counter; counting the number of request packets whose corresponding response packets are yet to be detected, from among the plurality of request packets by using a Multiple Outstanding (MO) counter, determining whether an MO count value of the MO counter is valid; and if the MO count value is invalid, resetting the event counter.
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公开(公告)号：US10564855B2
公开(公告)日：2020-02-18
申请号：US16503200
申请日：2019-07-03
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Nak Hee Seong , Sang Youn Lee , Seong Min Jo , Yun Kyo Cho , Dong Soo Kang , Byeong Jin Kim , Jae Geun Yun
IPC: H04L12/26 , H04L12/24 , G06F3/06 , G06F13/42 , G06F13/364
Abstract: An operating method of a semiconductor device includes monitoring multiple request packets and multiple response packets that are being transmitted between a master device and a slave device. A target request packet that matches predefined identification (ID) information is detected from among the request packets. An operation of a latency counter is initiated. The operation is for measuring the latency of a communication exchange (transaction) that includes the target request packet and a target response packet that is one of the response packets that matches the predefined ID information. The target response packet is detected from among the response packets. The operation of the latency counter is terminated. A latency value of the communication exchange is acquired from the latency counter.
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公开(公告)号：US10379749B2
公开(公告)日：2019-08-13
申请号：US15423628
申请日：2017-02-03
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Nak Hee Seong , Sang Youn Lee , Seong Min Jo , Yun Kyo Cho , Dong Soo Kang , Byeong Jin Kim , Jae Geun Yun
IPC: H04L12/26 , H04L12/24 , G06F3/06 , G06F13/364 , G06F13/42
Abstract: An operating method of a semiconductor device includes monitoring multiple request packets and multiple response packets that are being transmitted between a master device and a slave device. A target request packet that matches predefined identification (ID) information is detected from among the request packets. An operation of a latency counter is initiated. The operation is for measuring the latency of a communication exchange (transaction) that includes the target request packet and a target response packet that is one of the response packets that matches the predefined ID information. The target response packet is detected from among the response packets. The operation of the latency counter is terminated. A latency value of the communication exchange is acquired from the latency counter.
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9.发明授权公开(公告)号：US09984019B2
公开(公告)日：2018-05-29
申请号：US14962373
申请日：2015-12-08
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Jun Hee Yoo , Jae Geun Yun , Bub Chul Jeong , Dong Soo Kang , Kyeo Rae Lee , Seong Min Jo
IPC: G06F13/368 , G06F13/40 , G06F13/16
CPC classification number: G06F13/368 , G06F13/1621 , G06F13/4068 , Y02D10/14 , Y02D10/151
Abstract: A system on chip (SoC) is present that includes a plurality of master interfaces, a plurality of slave interfaces, and an interface circuit which is connected between the plurality of master interfaces and the plurality of slave interfaces and includes a plurality of components. When a first master interface among the plurality of master interfaces and a first slave interface among the plurality of slave interfaces are paired, a first group of the components which forms a first signal path between the first master interface and the first slave interface among the plurality of components is enabled according to a control of the first master interface.
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10.发明申请公开(公告)号：US20180276160A1
公开(公告)日：2018-09-27
申请号：US15989539
申请日：2018-05-25
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： JUN HEE YOO , Jae Geun Yun , Bub Chul Jeong , Dong Soo Kang , Kyeo Rae Lee , Seong Min Jo
IPC: G06F13/368 , G06F13/40 , G06F13/16
CPC classification number: G06F13/368 , G06F13/1621 , G06F13/4068 , Y02D10/14 , Y02D10/151
Abstract: A system on chip (SoC) is present that includes a plurality of master interfaces, a plurality of slave interfaces, and an interface circuit which is connected between the plurality of master interfaces and the plurality of slave interfaces and includes a plurality of components. When a first master interface among the plurality of master interfaces and a first slave interface among the plurality of slave interfaces are paired, a first group of the components which forms a first signal path between the first master interface and the first slave interface among the plurality of components is enabled according to a control of the first master interface.
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