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公开(公告)号：US11652718B2
公开(公告)日：2023-05-16
申请号：US17743579
申请日：2022-05-13
Applicant: Samsung Electronics Co., Ltd.
Inventor： Jae Geun Yun , Seong Min Jo , Yun Kyo Cho , Byeong Jin Kim , Dong Soo Kang , Nak Hee Seong
IPC: G06F30/35 , H04L43/0852 , H04L43/0876 , H04L41/06
CPC classification number: H04L43/0858 , H04L41/06 , H04L43/0876
Abstract: A semiconductor device and an operating method thereof are provided. An operating method of a semiconductor device, includes monitoring a plurality of request packets and a plurality of response packets that are being transmitted between a master device and a slave device; detecting a target request packet that matches desired identification (ID) information from among the plurality of request packets; counting the number of events of a transaction including the target request packet by using an event counter; counting the number of request packets whose corresponding response packets are yet to be detected, from among the plurality of request packets by using a Multiple Outstanding (MO) counter; determining whether an MO count value of the MO counter is valid; and if the MO count value is invalid, resetting the event counter.
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2.发明授权公开(公告)号：US10210093B2
公开(公告)日：2019-02-19
申请号：US14478039
申请日：2014-09-05
Applicant: Samsung Electronics Co., Ltd.
Inventor： Nak Hee Seong
IPC: G06F12/08 , G06F12/0895 , G06F12/0802
Abstract: A method of operating a memory device that includes at least one sub-memory supporting a cache mode and a memory mode, the method including receiving a mode change signal instructing the memory device to change an operation mode of the at least one sub-memory from the cache mode to the memory mode; and changing the operation mode of the at least one sub-memory from the cache mode to the memory mode without flushing the at least one sub-memory, according to the mode change signal.
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公开(公告)号：US11349738B2
公开(公告)日：2022-05-31
申请号：US16886315
申请日：2020-05-28
Applicant: Samsung Electronics Co., Ltd.
Inventor： Jae Geun Yun , Seong Min Jo , Yun Kyo Cho , Byeong Jin Kim , Dong Soo Kang , Nak Hee Seong
IPC: G06F11/30 , H04L43/0852 , H04L43/0876 , H04L41/06
Abstract: A semiconductor device and an operating method thereof are provided. An operating method of a semiconductor device, includes monitoring a plurality of request packets and a plurality of response packets that are being transmitted between a master device and a slave device; detecting a target request packet that matches desired identification (ID) information from among the plurality of request packets; counting the number of events of a transaction including the target request packet by using an event counter; counting the number of request packets whose corresponding response packets are yet to be detected, from among the plurality of request packets by using a Multiple Outstanding (MO) counter; determining whether an MO count value of the MO counter is valid; and if the MO count value is invalid, resetting the event counter.
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Patent Agency Ranking
公开(公告)号：US09811482B2
公开(公告)日：2017-11-07
申请号：US15344931
申请日：2016-11-07
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Hee-Seong Lee , Woo-Jin Kim , Nak Hee Seong
CPC classification number: G06F13/1689 , G06F1/12 , G06F1/324 , G06F13/36 , G06F13/4068 , G06F13/42 , Y02D10/126 , Y02D10/151
Abstract: A mobile system includes a first interface configured to transmit a payload in synchronization with a first clock signal through a first channel at a first transfer rate; and a second interface that includes: a payload storage connected to the first channel and configured to receive the payload from the first channel; and a payload receiver connected to the payload storage and configured to receive the payload from the payload storage in synchronization with a second clock at a second transfer rate through a second channel. A length of the second channel is shorter than a length of the first channel, and the first clock signal is asynchronous with the second clock signal.
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公开(公告)号：US10680923B2
公开(公告)日：2020-06-09
申请号：US15427522
申请日：2017-02-08
Applicant: Samsung Electronics Co., Ltd.
Inventor： Jae Geun Yun , Seong Min Jo , Yun Kyo Cho , Byeong Jin Kim , Dong Soo Kang , Nak Hee Seong
Abstract: A semiconductor device and an operating method thereof are provided. An operating method of a semiconductor device, includes monitoring a plurality of request packets and a plurality of response packets that are being transmitted between a master device and a slave device; detecting a target request packet that matches desired identification (ID) information from among the plurality of request packets; counting the number of events of a transaction including the target request packet by using an event counter; counting the number of request packets whose corresponding response packets are yet to be detected, from among the plurality of request packets by using a Multiple Outstanding (MO) counter, determining whether an MO count value of the MO counter is valid; and if the MO count value is invalid, resetting the event counter.
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公开(公告)号：US10564855B2
公开(公告)日：2020-02-18
申请号：US16503200
申请日：2019-07-03
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Nak Hee Seong , Sang Youn Lee , Seong Min Jo , Yun Kyo Cho , Dong Soo Kang , Byeong Jin Kim , Jae Geun Yun
IPC: H04L12/26 , H04L12/24 , G06F3/06 , G06F13/42 , G06F13/364
Abstract: An operating method of a semiconductor device includes monitoring multiple request packets and multiple response packets that are being transmitted between a master device and a slave device. A target request packet that matches predefined identification (ID) information is detected from among the request packets. An operation of a latency counter is initiated. The operation is for measuring the latency of a communication exchange (transaction) that includes the target request packet and a target response packet that is one of the response packets that matches the predefined ID information. The target response packet is detected from among the response packets. The operation of the latency counter is terminated. A latency value of the communication exchange is acquired from the latency counter.
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公开(公告)号：US10379749B2
公开(公告)日：2019-08-13
申请号：US15423628
申请日：2017-02-03
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Nak Hee Seong , Sang Youn Lee , Seong Min Jo , Yun Kyo Cho , Dong Soo Kang , Byeong Jin Kim , Jae Geun Yun
IPC: H04L12/26 , H04L12/24 , G06F3/06 , G06F13/364 , G06F13/42
Abstract: An operating method of a semiconductor device includes monitoring multiple request packets and multiple response packets that are being transmitted between a master device and a slave device. A target request packet that matches predefined identification (ID) information is detected from among the request packets. An operation of a latency counter is initiated. The operation is for measuring the latency of a communication exchange (transaction) that includes the target request packet and a target response packet that is one of the response packets that matches the predefined ID information. The target response packet is detected from among the response packets. The operation of the latency counter is terminated. A latency value of the communication exchange is acquired from the latency counter.
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公开(公告)号：US09489009B2
公开(公告)日：2016-11-08
申请号：US14486434
申请日：2014-09-15
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Hee-Seong Lee , Woo-Jin Kim , Nak Hee Seong
CPC classification number: G06F13/1689 , G06F1/12 , G06F1/324 , G06F13/36 , G06F13/4068 , G06F13/42 , Y02D10/126 , Y02D10/151
Abstract: A mobile system includes a first interface configured to transmit a payload in synchronization with a first clock signal through a first channel at a first transfer rate; and a second interface that includes: a payload storage connected to the first channel and configured to receive the payload from the first channel; and a payload receiver connected to the payload storage and configured to receive the payload from the payload storage in synchronization with a second clock at a second transfer rate through a second channel. A length of the second channel is shorter than a length of the first channel, and the first clock signal is asynchronous with the second clock signal.
Abstract translation: 移动系统包括：第一接口，被配置为以第一传输速率通过第一信道与第一时钟信号同步发送有效载荷; 以及第二接口，其包括：连接到所述第一信道并被配置为从所述第一信道接收所述有效载荷的有效载荷存储器; 以及有效载荷接收器，其连接到所述有效载荷存储器并且被配置为以与所述第二信道的第二传送速率的第二时钟同步地从所述有效负载存储器接收所述有效载荷 第二通道的长度小于第一通道的长度，并且第一时钟信号与第二时钟信号是异步的。
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