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公开(公告)号：US20240388813A1
公开(公告)日：2024-11-21
申请号：US18788084
申请日：2024-07-29
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Jaehoon Jun , Hyukbin Kwon , Woong Joo
IPC: H04N25/75 , H04N25/709
Abstract: Disclosed is a circuit which includes a first amplifier that generates a first output signal by comparing a first pixel signal corresponding to a first conversion gain and a first ramp signal and generates a second output signal by comparing a second pixel signal corresponding to a second conversion gain and a second ramp signal, and a second amplifier that generates a third output signal based on the first output signal and generates a fourth output signal based on the second output signal, the first conversion gain is higher than the second conversion gain, and a first power current of the first amplifier when the first pixel signal and the first ramp signal are compared is different from a second power current of the first amplifier when the second pixel signal and the second ramp signal are compared.
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2.发明授权公开(公告)号：US11616926B2
公开(公告)日：2023-03-28
申请号：US17569844
申请日：2022-01-06
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Jaehoon Jun , Han Yang
Abstract: Disclosed is a circuit which includes a first amplifier that generates a first output signal by comparing a ramp signal and a reset signal of a pixel signal output from a pixel array in a first operating period and comparing the ramp signal and an image signal of the pixel signal output from the pixel array in a second operating period, a second amplifier that generates a second output signal based on the first output signal, and a counter. During at least one operating period of the first operating period and the second operating period, the first output signal controls a first source current of the first amplifier, or the second output signal controls at least one of the first source current of the first amplifier and a second source current of the second amplifier.
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公开(公告)号：US12063447B2
公开(公告)日：2024-08-13
申请号：US17973149
申请日：2022-10-25
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Jaehoon Jun , Hyukbin Kwon , Woong Joo
IPC: H04N25/75 , H04N25/709
CPC classification number: H04N25/75 , H04N25/709
Abstract: Disclosed is a circuit which includes a first amplifier that generates a first output signal by comparing a first pixel signal corresponding to a first conversion gain and a first ramp signal and generates a second output signal by comparing a second pixel signal corresponding to a second conversion gain and a second ramp signal, and a second amplifier that generates a third output signal based on the first output signal and generates a fourth output signal based on the second output signal, the first conversion gain is higher than the second conversion gain, and a first power current of the first amplifier when the first pixel signal and the first ramp signal are compared is different from a second power current of the first amplifier when the second pixel signal and the second ramp signal are compared.
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Patent Agency Ranking
公开(公告)号：US20240114265A1
公开(公告)日：2024-04-04
申请号：US18536803
申请日：2023-12-12
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Jaehoon Jun , Youngwoo Lee
IPC: H04N25/772 , H03M1/82
CPC classification number: H04N25/772 , H03M1/825
Abstract: A circuit includes a comparator configured to generate a first conversion gain output signal by comparing a first pixel signal corresponding to a first conversion gain with a first ramp signal, and generate a second conversion gain output signal by comparing a second pixel signal corresponding to a second conversion gain with a second ramp signal, and a counter configured to count pulses of the first conversion gain output signal, output a counting result as a first digital signal, and determine whether an output of a second digital signal corresponding to the second conversion gain is required, based on the first digital signal. The first conversion gain is higher than the second conversion gain, and based on determining that the output of the second digital signal is not required, the counter is further configured to control the comparator such that the second conversion gain output signal is not generated.
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公开(公告)号：US11792545B2
公开(公告)日：2023-10-17
申请号：US17678268
申请日：2022-02-23
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Jaehoon Jun , Han Yang
IPC: H04N25/709 , H04N25/75
CPC classification number: H04N25/709 , H04N25/75
Abstract: An image sensor including: a pixel array including first and second pixels connected to a column line; a row driver to provide the first pixel with a first selection signal based on a clamp voltage, and to provide the second pixel with a second selection signal based on a selection voltage, wherein the first pixel outputs a first output voltage in response to the first selection signal, and the second pixel outputs a second output voltage in response to the second selection signal, wherein the first and second output voltages are output as a pixel signal through the column line, wherein a voltage of the pixel signal corresponds to a voltage obtained by clamping the second output voltage with the first output voltage, and wherein a change in a voltage level of the first output voltage due to a temperature is compensated for by the clamp voltage.
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6.发明授权公开(公告)号：US12166498B2
公开(公告)日：2024-12-10
申请号：US17985642
申请日：2022-11-11
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Jaehoon Jun , Beomsu Yun
Abstract: In some embodiments, a circuit includes a first amplifier, a second amplifier, and a counter. The first amplifier operates based on a first power supply voltage and generates a first output signal by comparing a ramp signal and a reset signal of a pixel signal output from a pixel array during a first operation period and comparing the ramp signal and an image signal of the pixel signal output from the pixel array during a second operation period. The second amplifier operates based on the first power supply voltage, generates a second output signal based on the first output signal and adjust a voltage level of the second output signal from a low level to a third level. The counter operates based on a second power supply voltage, counts pulses of the second output signal, and outputs a counting result as a digital signal.
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公开(公告)号：US11889219B2
公开(公告)日：2024-01-30
申请号：US17950526
申请日：2022-09-22
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Jaehoon Jun , Youngwoo Lee
IPC: H04N25/772 , H03M1/82
CPC classification number: H04N25/772 , H03M1/825
Abstract: A circuit includes a comparator configured to generate a first conversion gain output signal by comparing a first pixel signal corresponding to a first conversion gain with a first ramp signal, and generate a second conversion gain output signal by comparing a second pixel signal corresponding to a second conversion gain with a second ramp signal, and a counter configured to count pulses of the first conversion gain output signal, output a counting result as a first digital signal, and determine whether an output of a second digital signal corresponding to the second conversion gain is required, based on the first digital signal. The first conversion gain is higher than the second conversion gain, and based on determining that the output of the second digital signal is not required, the counter is further configured to control the comparator such that the second conversion gain output signal is not generated.
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公开(公告)号：US11696055B2
公开(公告)日：2023-07-04
申请号：US17579722
申请日：2022-01-20
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Jaehoon Jun
IPC: H04N5/374 , H04N25/772 , H04N25/677 , H04N25/709 , H04N25/71
CPC classification number: H04N25/772 , H04N25/677 , H04N25/709 , H04N25/745
Abstract: An image sensor supporting a full resolution mode and a crop mode, the image sensor including: a pixel array including a plurality of pixels configured to generate a pixel signal by sensing an object; an analog-to-digital converter configured to convert the pixel signal into a digital signal and including a plurality of metal lines; a bias generator configured to apply a bias voltage to the plurality of metal lines; and a bias controller including: a first transistor configured to activate all of the plurality of metal lines based on a first control signal; and a second transistor configured to activate a first metal line for the crop mode among the plurality of metal lines based on a second control signal.
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