公开(公告)号：US20220018890A1

公开(公告)日：2022-01-20

申请号：US17491812

申请日：2021-10-01

Applicant: Samsung Electronics Co., Ltd.

Inventor： Dong-Uk RYU ,  Seongbeom KIM ,  Janghyuk AN

IPC: G01R31/26 ,  G01R19/165 ,  G01R31/27 ,  B60R16/023

Abstract: An electronic device including a processor and a sensor may be provided. The processor obtains a first degree of degradation of a first core based on a first parameter value associated with a lifetime of the first core and a first operating level associated with an operation of the first core. The processor obtains a second degree of degradation of a second core based on a second parameter value associated with a lifetime of the second core and a second operating level associated with an operation of the second core. The processor schedules a task of the first core and the second core based on the first degree of degradation and the second degree of degradation. The sensor provides the first parameter value and the first operating level to the first core and the second parameter value and the second operating level to the second core.

公开(公告)号：US20240411682A1

公开(公告)日：2024-12-12

申请号：US18499585

申请日：2023-11-01

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Janghyuk AN ,  Yong In LEE

IPC: G06F12/02 ,  G06F12/1009

Abstract: A Compute Express Link (CXL) memory device includes: memory cell groups configured to store data; one or more sensors configured to measure degradation factors of the memory cell groups; and a control component configured to: receive a memory allocation request from a host device connected to the CXL memory device using CXL; and perform memory allocation of the memory cell groups for the host device based on degradation states of the memory cell groups according to the degradation factors of the memory cell groups.

公开(公告)号：US20150234737A1

公开(公告)日：2015-08-20

申请号：US14622185

申请日：2015-02-13

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Manyoung SHIN ,  Janghyuk AN

IPC: G06F11/36 ,  G01K13/00 ,  G01R31/28 ,  G06F11/263

CPC classification number: G06F11/3692 ,  G01R31/2868 ,  G06F11/24 ,  G06F11/263

Abstract: A test system method for testing software of each of a plurality of system on chips (SoCs) are provided. The test system includes: a plurality of test units configured to test the plurality of SoCs according to a plurality of test cases, respectively; a power supplier configured to supply, to each of the plurality of test units, power of a level corresponding to a corresponding test case, among the plurality of test cases; a temperature controller configured to provide, to each of the plurality of test units, a temperature control signal according to the corresponding test case, and to monitor a measurement temperature, provided from each of the plurality of test units, of each of the plurality of SoCs; and an analyzer configured to analyze at least one of a driving voltage, a driving current, and a driving frequency of each of the plurality of SoCs.

Abstract translation: 提供了一种用于测试多个芯片系统（SoC）中的每一个的软件的测试系统方法。 所述测试系统包括：多个测试单元，被配置为分别根据多个测试用例测试所述多个SoC; 电力供给器，被配置为在所述多个测试用例中向所述多个测试单元中的每一个提供与相应的测试用例对应的电平的电力; 温度控制器，被配置为向所述多个测试单元中的每一个提供根据相应测试用例的温度控制信号，并且监视从所述多个测试单元中的每一个提供的测量温度， SoC; 以及分析器，被配置为分析所述多个SoC中的每一个的驱动电压，驱动电流和驱动频率中的至少一个。