公开(公告)号：US10453796B2

公开(公告)日：2019-10-22

申请号：US15706655

申请日：2017-09-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jungwoo Song ,  Ye-Ro Lee ,  Kwangtae Hwang ,  Kwangmin Kim ,  Yong Kwan Kim ,  Jiyoung Kim

IPC: H01L27/108 ,  H01L21/768 ,  H01L23/532 ,  H01L27/02 ,  H01L23/522

Abstract: A semiconductor device including a substrate includes an active region. A bit line structure extends across the active region. A landing pad is disposed on an end portion of the active region. A first spacer is disposed between the bit line structure and the landing pad. A second spacer is disposed between the first spacer and the landing pad. An air spacer is disposed between the first spacer and the second spacer. A capping pattern is disposed between a sidewall of the landing pad and a sidewall of the bit line structure. The capping pattern defines a top surface of the air spacer and comprises a metallic material.

公开(公告)号：US11450554B2

公开(公告)日：2022-09-20

申请号：US17003304

申请日：2020-08-26

Applicant: Samsung Electronics Co., Ltd.

Inventor： Geumbi Mun ,  Jinyong Kim ,  Junwon Lee ,  Kwangtae Hwang ,  Iksoo Kim ,  Jiwoon Im

IPC: H01L21/62 ,  H01L21/02 ,  H01L21/762 ,  H01L27/108

Abstract: To manufacture an integrated circuit (IC) device, a lower structure having a step structure defining a trench is prepared. A material film is formed inside the trench. To form a material film, a first precursor including a first central element and a first ligand having a first size is supplied onto a lower structure to form a first chemisorbed layer of the first precursor on the lower structure. A second precursor including a second central element and a second ligand having a second size less than the first size is supplied onto a resultant structure including the first chemisorbed layer to form a second chemisorbed layer of the second precursor on the lower structure. A reactive gas is supplied to the first chemisorbed layer and the second chemisorbed layer.

公开(公告)号：US20200335313A1

公开(公告)日：2020-10-22

申请号：US16814040

申请日：2020-03-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kwangtae Hwang ,  Jinyong Kim ,  lksoo Kim ,  Geumbi Mun ,  Junwon Lee ,  Jiwoon Im

IPC: H01J37/32

Abstract: Provided are a radical monitoring apparatus capable of monitoring electrical diagnosis of a radical produced by direct plasma or remote plasma and the amount of change of the produced radical, and a plasma apparatus including the radical monitoring apparatus. The plasma apparatus includes a process chamber in which a plasma process is performed, a dielectric film in the process chamber and surrounding sides of a plasma discharge space in the process chamber, and a sensor inside the dielectric film and configured to monitor plasma to thereby monitor a radical generated in the plasma.

公开(公告)号：US09997400B2

公开(公告)日：2018-06-12

申请号：US15332297

申请日：2016-10-24

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sangho Rha ,  Kyoung Hee Nam ,  Jeonggil Lee ,  Hyunseok Lim ,  Seungjong Park ,  Seulgi Bae ,  Jaejin Lee ,  Kwangtae Hwang

IPC: H01L21/768

CPC classification number: H01L21/76816 ,  H01L21/7684 ,  H01L21/76847 ,  H01L21/76849 ,  H01L21/76864 ,  H01L21/76867 ,  H01L21/76882 ,  H01L23/53238

Abstract: A semiconductor device includes a substrate, a first metal interconnection provided on a first region of the substrate, and a second metal interconnection provided on a second region of the substrate. A width of the second metal interconnection is greater than a width of the first metal interconnection. The first metal interconnection includes a metal pattern. The second metal interconnection includes a lower metal pattern having a concave surface at its top, an upper metal pattern disposed on the concave surface at the top of the lower metal pattern, and a first barrier pattern interposed between the lower metal pattern and the upper metal pattern. The metal interconnections are formed by a damascene process including deposition, reflow, metal implantation, and planarization processes.

公开(公告)号：US11837545B2

公开(公告)日：2023-12-05

申请号：US17399043

申请日：2021-08-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jungwoo Song ,  Ye-Ro Lee ,  Kwangtae Hwang ,  Kwangmin Kim ,  Yong Kwan Kim ,  Jiyoung Kim

IPC: H10B12/00 ,  H01L23/532 ,  H01L27/02 ,  H01L21/768 ,  H01L23/522

CPC classification number: H01L23/5329 ,  H01L21/768 ,  H01L27/0207 ,  H10B12/033 ,  H10B12/053 ,  H10B12/315 ,  H10B12/34 ,  H10B12/482 ,  H10B12/485 ,  H01L21/7682 ,  H01L21/76897 ,  H01L23/5222

Abstract: A semiconductor device including a substrate includes an active region. A bit line structure extends across the active region. A landing pad is disposed on an end portion of the active region. A first spacer is disposed between the bit line structure and the landing pad. A second spacer is disposed between the first spacer and the landing pad. An air spacer is disposed between the first spacer and the second spacer. A capping pattern is disposed between a sidewall of the landing pad and a sidewall of the bit line structure. The capping pattern defines a top surface of the air spacer and comprises a metallic material.

公开(公告)号：US11264219B2

公开(公告)日：2022-03-01

申请号：US16814040

申请日：2020-03-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kwangtae Hwang ,  Jinyong Kim ,  Iksoo Kim ,  Geumbi Mun ,  Junwon Lee ,  Jiwoon Im

IPC: H01J37/32

Abstract: Provided are a radical monitoring apparatus capable of monitoring electrical diagnosis of a radical produced by direct plasma or remote plasma and the amount of change of the produced radical, and a plasma apparatus including the radical monitoring apparatus. The plasma apparatus includes a process chamber in which a plasma process is performed, a dielectric film in the process chamber and surrounding sides of a plasma discharge space in the process chamber, and a sensor inside the dielectric film and configured to monitor plasma to thereby monitor a radical generated in the plasma.

公开(公告)号：US20210193508A1

公开(公告)日：2021-06-24

申请号：US17003304

申请日：2020-08-26

Applicant: Samsung Electronics Co., Ltd.

Inventor： Geumbi Mun ,  Jinyong Kim ,  Junwon Lee ,  Kwangtae Hwang ,  Iksoo Kim ,  Jiwoon Im

IPC: H01L21/762 ,  H01L27/108 ,  H01L21/02

Abstract: To manufacture an integrated circuit (IC) device, a lower structure having a step structure defining a trench is prepared. A material film is formed inside the trench. To form a material film, a first precursor including a first central element and a first ligand having a first size is supplied onto a lower structure to form a first chemisorbed layer of the first precursor on the lower structure. A second precursor including a second central element and a second ligand having a second size less than the first size is supplied onto a resultant structure including the first chemisorbed layer to form a second chemisorbed layer of the second precursor on the lower structure. A reactive gas is supplied to the first chemisorbed layer and the second chemisorbed layer.

公开(公告)号：US10347527B2

公开(公告)日：2019-07-09

申请号：US15975003

申请日：2018-05-09

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sangho Rha ,  Kyoung Hee Nam ,  Jeonggil Lee ,  Hyunseok Lim ,  Seungjong Park ,  Seulgi Bae ,  Jaejin Lee ,  Kwangtae Hwang

IPC: H01L21/768 ,  H01L23/532

Abstract: A semiconductor device includes a substrate, a first metal interconnection provided on a first region of the substrate, and a second metal interconnection provided on a second region of the substrate. A width of the second metal interconnection is greater than a width of the first metal interconnection. The first metal interconnection includes a metal pattern. The second metal interconnection includes a lower metal pattern having a concave surface at its top, an upper metal pattern disposed on the concave surface at the top of the lower metal pattern, and a first barrier pattern interposed between the lower metal pattern and the upper metal pattern. The metal interconnections are formed by a damascene process including deposition, reflow, metal implantation, and planarization processes.