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公开(公告)号:US09748170B2
公开(公告)日:2017-08-29
申请号:US15146112
申请日:2016-05-04
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sangho Rha , Jongmin Baek , Wookyung You , Sanghoon Ahn , Naein Lee
IPC: H01L23/00 , H01L23/522 , H01L23/532 , H01L23/528 , H01L21/768 , H01L21/764
CPC classification number: H01L23/5226 , H01L21/764 , H01L21/76802 , H01L21/76816 , H01L21/7682 , H01L21/76837 , H01L21/76843 , H01L21/76877 , H01L23/5222 , H01L23/528 , H01L23/53223 , H01L23/53266 , H01L23/5329 , H01L23/53295 , H01L2924/00 , H01L2924/0002
Abstract: A semiconductor device includes a substrate, a plurality of first conductive patterns disposed on the substrate and a plurality of second conductive patterns disposed on the first conductive patterns. Respective air gaps are disposed between adjacent ones of the first conductive patterns overlying a first region of the substrate, while adjacent ones of the first conductive patterns overlying a second region of the substrate do not have air gaps disposed therebetween. The air gaps may include first air gaps, and the device may further include second air gaps disposed between adjacent ones of the second conductive patterns in the second region. Adjacent ones of the second conductive patterns overlying a second region of the substrate may not have air gaps disposed therebetween.
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公开(公告)号:US09558994B2
公开(公告)日:2017-01-31
申请号:US15205168
申请日:2016-07-08
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Wookyung You , Sanghoon Ahn , Sangho Rha , Jongmin Baek , Nae-In Lee
IPC: H01L21/768 , H01L23/485 , H01L23/522 , H01L23/528 , H01L23/532
CPC classification number: H01L21/7682 , H01L21/76816 , H01L21/76829 , H01L21/76831 , H01L21/76837 , H01L21/76843 , H01L21/76849 , H01L21/7685 , H01L21/76877 , H01L21/76879 , H01L23/485 , H01L23/5222 , H01L23/5226 , H01L23/528 , H01L23/53223 , H01L23/53238 , H01L23/53266 , H01L23/5329 , H01L23/53295 , H01L2924/0002 , H01L2924/00
Abstract: A semiconductor device includes a substrate including a first region and a second region, first conductive patterns disposed on the first region and spaced apart from each other by a first distance, second conductive patterns disposed on the second region and spaced apart from each other by a second distance greater than the first distance, and an interlayer insulating layer disposed between the second conductive patterns and including at least one recess region having a width corresponding to the first distance.
Abstract translation: 一种半导体器件包括:包括第一区域和第二区域的衬底;第一导电图案,设置在第一区域上并且彼此间隔开第一距离;第二导电图案,设置在第二区域上并且彼此间隔开 第二距离大于第一距离,以及层间绝缘层,设置在第二导电图案之间并且包括具有对应于第一距离的宽度的至少一个凹部区域。
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公开(公告)号:US10707164B2
公开(公告)日:2020-07-07
申请号:US16296388
申请日:2019-03-08
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Sangho Rha , Jongmin Baek , Wookyung You , Sanghoon Ahn , Nae-In Lee
IPC: H01L23/528 , H01L21/306 , H01L21/768 , H01L23/522 , H01L23/532 , H01L21/02 , H01L21/288 , H01L21/321
Abstract: Methods of forming a semiconductor device are provided. A method of forming a semiconductor device may include forming a capping layer on a metal pattern and on an adjacent portion of an insulating layer, the capping layer comprising a first etch selectivity, with respect to the insulating layer, on the metal pattern and a second etch selectivity, with respect to the insulating layer, on the portion of the insulating layer. Moreover, the method may include forming a recess region adjacent the metal pattern by removing the capping layer from the portion of the insulating layer. At least a portion of the capping layer may remain on an uppermost surface of the metal pattern after removing the capping layer from the portion of the insulating layer. Related semiconductor devices are also provided.
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公开(公告)号:US10141258B2
公开(公告)日:2018-11-27
申请号:US15659125
申请日:2017-07-25
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sangho Rha , Jongmin Baek , Wookyung You , Sanghoon Ahn , Naein Lee
IPC: H01L23/00 , H01L23/522 , H01L23/532 , H01L23/528 , H01L21/768 , H01L21/764
Abstract: A semiconductor device includes a substrate, a plurality of first conductive patterns disposed on the substrate and a plurality of second conductive patterns disposed on the first conductive patterns. Respective air gaps are disposed between adjacent ones of the first conductive patterns overlying a first region of the substrate, while adjacent ones of the first conductive patterns overlying a second region of the substrate do not have air gaps disposed therebetween. The air gaps may include first air gaps, and the device may further include second air gaps disposed between adjacent ones of the second conductive patterns in the second region. Adjacent ones of the second conductive patterns overlying a second region of the substrate may not have air gaps disposed therebetween.
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公开(公告)号:US20180076127A1
公开(公告)日:2018-03-15
申请号:US15816243
申请日:2017-11-17
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jongmin Baek , Sangho Rha , Sanghoon Ahn , Wookyung You , Naein Lee
IPC: H01L23/528 , H01L21/768 , H01L23/532 , H01L23/522
CPC classification number: H01L23/528 , H01L21/7682 , H01L21/76834 , H01L23/5222 , H01L23/53223 , H01L23/53238 , H01L23/53266 , H01L23/53295 , H01L2924/0002 , H01L2924/00
Abstract: Semiconductor devices are provided. A semiconductor device includes gaps between conductive patterns. Moreover, the semiconductor device includes a permeable layer on the conductive patterns. Methods of fabricating semiconductor devices are also provided.
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公开(公告)号:US09524937B2
公开(公告)日:2016-12-20
申请号:US14503877
申请日:2014-10-01
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jongmin Baek , Sangho Rha , Sanghoon Ahn , Wookyung You , Naein Lee
IPC: H01L21/768 , H01L23/532 , H01L23/522
CPC classification number: H01L23/528 , H01L21/7682 , H01L21/76834 , H01L23/5222 , H01L23/53223 , H01L23/53238 , H01L23/53266 , H01L23/53295 , H01L2924/0002 , H01L2924/00
Abstract: Semiconductor devices are provided. A semiconductor device includes gaps between conductive patterns. Moreover, the semiconductor device includes a permeable layer on the conductive patterns. Methods of fabricating semiconductor devices are also provided.
Abstract translation: 提供半导体器件。 半导体器件包括导电图案之间的间隙。 此外,半导体器件在导电图案上包括可渗透层。 还提供了制造半导体器件的方法。
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公开(公告)号:US10269712B2
公开(公告)日:2019-04-23
申请号:US15927270
申请日:2018-03-21
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sangho Rha , Jongmin Baek , Wookyung You , Sanghoon Ahn , Nae-In Lee
IPC: H01L23/528 , H01L21/306 , H01L21/768 , H01L23/522 , H01L23/532 , H01L21/02 , H01L21/288 , H01L21/321
Abstract: Methods of forming a semiconductor device are provided. A method of forming a semiconductor device may include forming a capping layer on a metal pattern and on an adjacent portion of an insulating layer, the capping layer comprising a first etch selectivity, with respect to the insulating layer, on the metal pattern and a second etch selectivity, with respect to the insulating layer, on the portion of the insulating layer. Moreover, the method may include forming a recess region adjacent the metal pattern by removing the capping layer from the portion of the insulating layer. At least a portion of the capping layer may remain on an uppermost surface of the metal pattern after removing the capping layer from the portion of the insulating layer. Related semiconductor devices are also provided.
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公开(公告)号:US09842803B2
公开(公告)日:2017-12-12
申请号:US15375567
申请日:2016-12-12
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jongmin Baek , Sangho Rha , Sanghoon Ahn , Wookyung You , Naein Lee
IPC: H01L21/768 , H01L23/528 , H01L23/532
CPC classification number: H01L23/528 , H01L21/7682 , H01L21/76834 , H01L23/5222 , H01L23/53223 , H01L23/53238 , H01L23/53266 , H01L23/53295 , H01L2924/0002 , H01L2924/00
Abstract: Semiconductor devices are provided. A semiconductor device includes gaps between conductive patterns. Moreover, the semiconductor device includes a permeable layer on the conductive patterns. Methods of fabricating semiconductor devices are also provided.
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公开(公告)号:US09711453B2
公开(公告)日:2017-07-18
申请号:US15155539
申请日:2016-05-16
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sangho Rha , Jongmin Baek , Wookyung You , Sanghoon Ahn , Nae-In Lee
IPC: H01L23/528 , H01L21/306 , H01L21/768 , H01L23/522 , H01L23/532 , H01L21/02 , H01L21/288 , H01L21/321
CPC classification number: H01L23/5283 , H01L21/02178 , H01L21/02274 , H01L21/0228 , H01L21/288 , H01L21/306 , H01L21/3212 , H01L21/76802 , H01L21/7682 , H01L21/76826 , H01L21/76829 , H01L21/76832 , H01L21/76834 , H01L21/7684 , H01L21/76843 , H01L21/76849 , H01L21/76871 , H01L21/76877 , H01L21/76885 , H01L23/5222 , H01L23/5226 , H01L23/53238 , H01L23/5329 , H01L23/53295 , H01L2924/0002 , H01L2924/00
Abstract: Methods of forming a semiconductor device are provided. A method of forming a semiconductor device may include forming a capping layer on a metal pattern and on an adjacent portion of an insulating layer, the capping layer comprising a first etch selectivity, with respect to the insulating layer, on the metal pattern and a second etch selectivity, with respect to the insulating layer, on the portion of the insulating layer. Moreover, the method may include forming a recess region adjacent the metal pattern by removing the capping layer from the portion of the insulating layer. At least a portion of the capping layer may remain on an uppermost surface of the metal pattern after removing the capping layer from the portion of the insulating layer. Related semiconductor devices are also provided.
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公开(公告)号:US20160322254A1
公开(公告)日:2016-11-03
申请号:US15205168
申请日:2016-07-08
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: WOOKYUNG YOU , Sanghoon Ahn , Sangho Rha , Jongmin Baek , Nae-In Lee
IPC: H01L21/768 , H01L23/532 , H01L23/522 , H01L23/528
CPC classification number: H01L21/7682 , H01L21/76816 , H01L21/76829 , H01L21/76831 , H01L21/76837 , H01L21/76843 , H01L21/76849 , H01L21/7685 , H01L21/76877 , H01L21/76879 , H01L23/485 , H01L23/5222 , H01L23/5226 , H01L23/528 , H01L23/53223 , H01L23/53238 , H01L23/53266 , H01L23/5329 , H01L23/53295 , H01L2924/0002 , H01L2924/00
Abstract: A semiconductor device includes a substrate including a first region and a second region, first conductive patterns disposed on the first region and spaced apart from each other by a first distance, second conductive patterns disposed on the second region and spaced apart from each other by a second distance greater than the first distance, and an interlayer insulating layer disposed between the second conductive patterns and including at least one recess region having a width corresponding to the first distance.
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