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公开(公告)号：US11764268B2
公开(公告)日：2023-09-19
申请号：US17749719
申请日：2022-05-20
Applicant: Samsung Electronics Co., Ltd.
Inventor： Sunggil Kim , Kyengmun Kang , Juyon Suh , Hyeeun Hong
CPC classification number: H01L29/1037 , H01L24/08 , H01L25/074 , H01L2224/08146 , H10B41/27 , H10B43/27
Abstract: A semiconductor device, includes: gate electrodes spaced apart from each other and on a substrate; channel structures penetrating the gate electrodes, each of channel structures including a channel layer, a gate dielectric layer between the channel layer and the gate electrodes, a channel insulating layer filling between the channel layers, a channel pad on the channel insulating layer; and separation regions penetrating the gate electrodes, and spaced apart from each other, wherein the gate dielectric layer extends upwardly, further than the channel layer upwardly such that a portion of an inner side surface of the gate dielectric layer contacts the channel pad, the channel pad includes a lower pad on an upper end of the channel layer and the inner side surface of the gate dielectric layer, and having a first recess between the inner side surfaces of the gate dielectric layer; and an upper pad having a first portion in the first recess and a second portion extending from the first portion in a direction, parallel to an upper surface of the substrate on the first portion.
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公开(公告)号：US11956967B2
公开(公告)日：2024-04-09
申请号：US17222403
申请日：2021-04-05
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Sunggil Kim , Kyengmun Kang , Hyeeun Hong
CPC classification number: H10B43/40 , H10B41/10 , H10B41/27 , H10B41/35 , H10B41/40 , H10B43/10 , H10B43/27 , H10B43/35
Abstract: An integrated circuit device includes a peripheral circuit structure arranged on a substrate, a gate stack arranged on the peripheral circuit structure and including a plurality of gate electrodes, and a dam structure formed in a dam opening portion that passes through the gate stack. The dam structure includes an insulation spacer on an inner wall of the dam opening portion and a pair of sloped sidewalls at an upper side of the dam opening portion, and a buried layer filling an inside of the dam opening portion and including an air space. The integrated circuit device further includes a mold gate stack surrounded by the dam structure and including a plurality of mold layers, a plurality of conductive lines arranged on the gate stack, and a plurality of through electrodes connected to the plurality of conductive lines, passing through the mold gate stack, and surrounded by the dam structure.
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公开(公告)号：US11342415B2
公开(公告)日：2022-05-24
申请号：US17085467
申请日：2020-10-30
Applicant: Samsung Electronics Co., Ltd.
Inventor： Sunggil Kim , Kyengmun Kang , Juyon Suh , Hyeeun Hong
IPC: H01L29/10 , H01L25/07 , H01L27/11 , H01L23/00 , H01L27/11556 , H01L27/11582
Abstract: A semiconductor device, includes: gate electrodes spaced apart from each other and on a substrate; channel structures penetrating the gate electrodes, each of channel structures including a channel layer, a gate dielectric layer between the channel layer and the gate electrodes, a channel insulating layer filling between the channel layers, a channel pad on the channel insulating layer; and separation regions penetrating the gate electrodes, and spaced apart from each other, wherein the gate dielectric layer extends upwardly, further than the channel layer upwardly such that a portion of an inner side surface of the gate dielectric layer contacts the channel pad, the channel pad includes a lower pad on an upper end of the channel layer and the inner side surface of the gate dielectric layer, and having a first recess between the inner side surfaces of the gate dielectric layer; and an upper pad having a first portion in the first recess and a second portion extending from the first portion in a direction, parallel to an upper surface of the substrate on the first portion.
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