公开(公告)号：US20220376119A1

公开(公告)日：2022-11-24

申请号：US17585284

申请日：2022-01-26

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jaehyun YOO ,  Kyuok LEE ,  Uihui KWON ,  Junhyeok KIM ,  Yongwoo JEON ,  Dawon JEONG ,  Jaehyok KO

IPC: H01L29/861 ,  H01L29/40 ,  H01L29/06

Abstract: A semiconductor protection device includes: an N-type epitaxial layer, a device isolation layer disposed in the N-type epitaxial layer, an N-type drift region disposed below the device isolation layer, an N-type well disposed in the N-type drift region, first and second P-type drift regions, respectively disposed to be in contact with the device isolation layer, and spaced apart from the N-type drift region, first and second P-type doped regions, respectively disposed in the first and second P-type drift regions, first and second N-type floating wells, respectively disposed in the first and second P-type drift regions to be spaced apart from the first and second P-type doped regions, and disposed to be in contact with the device isolation layer, and first and second contact layer, respectively disposed to cover the first and second N-type floating well, to be in contact with the device isolation layer.

公开(公告)号：US20160172486A1

公开(公告)日：2016-06-16

申请号：US14964758

申请日：2015-12-10

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Minhwan KIM ,  Jaehyun JUNG ,  Jungkyung KIM ,  Kyuok LEE ,  Jaejune JANG ,  Changki JEON ,  Suyeon CHO ,  Seonghoon KO ,  Kyu-Heon CHO

IPC: H01L29/78 ,  H01L29/423 ,  H01L29/08 ,  H01L29/06 ,  H01L29/10

CPC classification number: H01L29/402 ,  H01L29/0653 ,  H01L29/42368 ,  H01L29/4238 ,  H01L29/66689 ,  H01L29/7816

Abstract: A semiconductor device includes a semiconductor substrate having a first conductivity type, an epitaxial layer having a second conductivity type, an isolation area in the epitaxial layer to define an active area of the semiconductor substrate, a body area having a first conductivity type and a drift area having a second conductivity type adjacent to each other in the epitaxial layer, a LOCOS insulating layer in the drift area and surrounded by the drift area, a drain area adjacent to a side part of the LOCOS insulating layer and surrounded by the drift area, a body contact area and a source area in the body area and surrounded by the body area, and a gate area overlapping the drift area and a part of the LOCOS insulating layer from a direction of the body area.

Abstract translation: 半导体器件包括具有第一导电类型的半导体衬底，具有第二导电类型的外延层，外延层中的限定半导体衬底的有源区的隔离区，具有第一导电类型的体区和漂移 在外延层中具有彼此相邻的第二导电类型的区域，漂移区域中的LOCOS绝缘层并被漂移区域包围，与LOCOS绝缘层的侧部相邻并被漂移区域包围的漏极区域， 身体接触区域和身体区域中的源区域，并且被身体区域包围，以及从身体区域的方向与漂移区域和LOCOS绝缘层的一部分重叠的门区域。